Method and system for multiple tuner application using a low noise broadband distribution amplifier

• US 20030035070A1
• Filed: 08/08/2002
• Published: 02/20/2003
• Est. Priority Date: 08/15/2001
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Burns, Lawrence M., Dauphinee, Leonard, Fanous, Adel, McMullin, Donald
• Granted Patent: US 7,579,912 B2
• Time in Patent Office: Days
• US Class Current: 348/707
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier
• CPC Class Codes: H03F 2203/45302 the common gate stage of a cascode dif amp being controlled
• CPC Class Codes: H03F 2203/45311 the common gate stage of a cascode dif amp being implemented by multiple transistors
• CPC Class Codes: H03F 2203/45464 the CSC comprising one or more coils
• CPC Class Codes: H03F 2203/45466 the CSC being controlled, e.g. by a signal derived from a non specified place in the dif amp circuit
• CPC Class Codes: H03F 2203/45638 the LC comprising one or more coils
• CPC Class Codes: H03F 2203/45696 the LC comprising more than two resistors
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence
• CPC Class Codes: H03F 3/45201 Non-folded cascode stages
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03G 1/0029 using FETs
• CPC Class Codes: H03G 3/3036 in high-frequency amplifiers or in frequency-changers H03G3/3052, H03G3/32, H03G3/34 take precedence
• CPC Class Codes: H03G 3/3052 in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver H03G3/32, H03G3/34 take precedence

Abstract

An active splitter circuit arrangement includes a first amplification module having a number of first input ports and first output ports. The first amplification module is configured to provide first stage amplification to a received input signal and produce from the amplified input signal a number of output signals, each substantially matching the input signal. Also included is a first gain control device having a number of gain input ports respectively coupled to the first output ports and a gain output port coupled to at least one of the first input ports. The first gain control device is configured to control a gain of the first amplification module. Next, a number of second amplification modules corresponding to the number of output signals has a number of second input ports respectively coupled to the first output ports. Each second amplification module is configured to receive a control signal from the second gain control device, provide second stage amplification to a corresponding one of the number of output signals based upon the control signal and produce an amplified output signal.

Claims

1. A circuit comprising:

a signal splitting mechanism configured to (i) receive a first signal as an input, (ii) amplify the received first signal, (iii) produce from the amplified first signal a number of second signals, each being substantially identical to the amplified first signal, and (iv) output each of the amplified second signals; and

a number of tuners corresponding to the number of second signals, each tuner being configured to receive one of the second signals output from the signal divider and derive one or more informational signals therefrom.

2. The circuit of claim 1, wherein each of the number of tuners excludes a low noise amplification function.

3. The circuit of claim 1, further comprising a variable gain amplifier coupled to an input of the signal splitting mechanism , the variable gain amplifier being configured to receive the first signal as an input thereto.

4. The circuit of claim 1, further comprising differential transmission lines to couple the signal splitting mechanism to the number of tuners.

5. The circuit of claim 1, wherein the signal splitting mechanism is an active signal splitting mechanism.

6. The circuit of claim 1, wherein the circuit is a cable set-top box configured for use in at least one of a television, a cable modem, a personal video recorder, and an out of band device.

7. An amplifier comprising:

a first amplification module having a number of first input ports and first output ports, the first amplification module being configured to (i) provide first stage amplification to a received input signal and (ii) produce from the amplified input signal a number of output signals, each having characteristics substantially matching characteristics of the input signal;

a first gain control device having a number of gain input ports respectively coupled to the first output ports and a gain output port coupled to at least one of the first input ports, the first gain control device being configured to control a gain of the first amplification module; and

a number of second amplification modules, each having a number of second input ports respectively coupled to the first output ports;

wherein each second amplification module is configured to (i) receive a control signal from a second gain control device, (ii) provide second stage amplification to a corresponding one of the number of output signals based upon the control signal and (iii) produce an amplified output signal.

8. The amplifier of claim 7, wherein each amplified output signal is a differential signal.

9. The amplifier of claim 8, wherein the first amplification module is a low noise amplifier.

10. The amplifier of claim 8, wherein the first amplification module is a low noise variable gain amplifier.

11. The amplifier of claim 8, wherein the first gain control device simultaneously controls a gain of all of the number of second amplification modules.

12. The amplifier of claim 8, wherein the number of second signals is representative of predetermined frequency spectrum;

and

wherein the first gain control device simultaneously controls a gain across the predetermined frequency spectrum.

13. The amplifier of claim 8, wherein a gain of the first amplification module is digitally controlled.

14. The amplifier of claim 8, wherein the first amplification module includes a power detector configured to (i) monitor the first output ports, (ii) produce a compensating signal based upon the monitoring, and (iii) provide the compensating signal as an input to the first amplification module.

15. The amplifier of claim 7, further comprising:

a tuner coupled to each of the second stage amplification modules and configured to receive the amplified output signal;

wherein the tuner derives information from the amplified output signal based upon a predetermined operating frequency, the tuner producing a tuned signal thereby; and

a demodulator coupled to the tuner and configured to demodulate the tuned signal, the demodulator (i) producing a gain control signal and (ii) providing the gain control signal to the second gain control device.

16. The amplifier of claim 15, wherein the first and second amplification modules are formed of differential amplifiers.

17. The amplifier of claim 15, wherein the tuner includes a variable gain amplifier.

18. The amplifier of claim 15, wherein the tuner includes a number of mixers and at least one filter.

19. The amplifier of claim 18, wherein the filter includes five or fewer channels.

20. The amplifier of claim 18, wherein the first amplification module is formed of a pair of plural differential amplifiers and a dividing network.

21. The amplifier of claim 20, wherein a gain of the first amplification module is controlled by performing at least one of selectively activating and deactivating particular ones of the plural differential amplifiers of the pair.

22. The amplifier of claim 18, wherein the filter includes five or fewer channels.

23. A method of amplifying a signal in a device including a first amplification module, a number of second amplification modules, and a gain control device, the method comprising:

receiving a transmitted signal in the first amplification module and applying a first level of amplification thereto; and

providing the first level amplified signal to each of the number of second amplification modules to produce a corresponding number of second level amplified signals, each second level amplified signal having characteristics substantially similar to the other of the number of second level amplified signals.

24. The method of claim 23, further comprising providing the number of second level amplified signals to a corresponding number of tuners.

25. The method of claim 23, further comprising:

detecting a signal level of each of the number of second level amplified signals;

producing a gain control signal based upon the detected signal level; and

providing the gain control signal as an input to each of the amplifiers of the second amplification module and controlling a gain thereof based upon the provided gain control signal.

26. An amplifier circuit comprising:

a first pair of active devices having common terminals thereof coupled together, wherein a control terminal of a first device of the first pair forms a first type non-inverting amplifier input port and an output terminal thereof forms an inverting amplifier output port;

wherein a control terminal of a second device of the first pair forms a first type inverting amplifier input port;

a second pair of active devices having common terminals thereof coupled together, wherein a control terminal of a first device of the second pair is coupled to the control terminal of the second device of the first pair, wherein an output terminal of a second device of the second pair forms a non-inverting amplifier output port, and wherein a control terminal of the second device of the second pair is coupled to the control terminal of the first device of the first pair; and

a third pair of active devices having common terminals thereof coupled together, wherein a control terminal of a first device of the third pair forms a second type non-inverting input port and an output terminal thereof is coupled to the common terminal of the first device of the first pair;

wherein a control terminal of a second device of the third pair forms a second type inverting input port and a common terminal thereof is coupled to the common terminal of the first device of the second pair.

27. The amplifier circuit of claim 26, wherein the active device is a transistor.

28. The amplifier of claim 27, wherein the control terminal, the output terminal, and the common terminal are respectively a gate, a drain, and a source.