Growing smooth semiconductor layers

• US 20030173559A1
• Filed: 03/13/2002
• Published: 09/18/2003
• Est. Priority Date: 03/13/2002
• Status: Active Grant

• Current Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Original Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Inventors: Pfeiffer, Loren Neil, West, Kenneth William, Akiyama, Hidefumi
• Granted Patent: US 6,921,726 B2
• Time in Patent Office: Days
• US Class Current: 257/14
• CPC Class Codes: C30B 23/02 Epitaxial-layer growth
• CPC Class Codes: C30B 29/40 AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
• CPC Class Codes: C30B 29/42 Gallium arsenide
• CPC Class Codes: H01L 21/02395 Arsenides
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02463 Arsenides
• CPC Class Codes: H01L 21/02546 Arsenides
• CPC Class Codes: H01L 21/02587 Structure
• CPC Class Codes: H01L 21/02609 Crystal orientation
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation

Abstract

A method includes epitaxially growing a semiconductor layer with a free surface and performing an anneal that reduces atomic roughness on the free surface. The free surface has an orientation with respect to lattice axes of the layer for which atoms in flat regions of the free surface have more chemical bonds to the layer than do, at least, some of the atoms at edges of monolayer steps on the free surface.

Claims

1. A method, comprising:

epitaxially growing a semiconductor layer with a free surface, the free surface having an orientation with respect to lattice axes of the layer for which atoms in flat regions of the free surface have more chemical bonds to the layer than do, at least, some of the atoms at edges of monolayer steps on the free surface; and

performing an anneal that reduces atomic roughness on the free surface.

2. The method of claim 1, wherein the growing includes stopping the growth at an average surface height that corresponds to an integer number of monolayers.

3. The method of claim 1, further comprising:

measuring a time-dependent rate of specular reflection off the growing semiconductor layer; and

wherein the growing includes stopping the growth in response to a selected measurement of the rate of specular reflection.

4. The method of claim 3, wherein the selected measurement indicates that specular reflection intensity has a relative maximum as a function of growing time.

5. The method of claim 1, further comprising:

cleaving a crystalline substrate to form an edge surface; and

wherein the epitaxially growing causes the semiconductor layer to grow on the edge surface.

6. The method of claim 1, wherein the growing includes growing a layer of one of a group III/V semiconductor and a semiconductor with a non-cubic lattice.

7. The method of claim 1, wherein the growing includes growing a GaAs layer along one of a 110-type crystal axis of GaAs and a 111-type crystal axis of GaAs.

8. The method of claim 7, wherein the substrate includes aluminum, gallium and arsenic.

9. The method of claim 1, further comprising:

epitaxially growing a layer of a different semiconductor on the annealed layer.

10. A method, comprising:

epitaxially growing a layer of a semiconductor on a smooth surface of a substrate to an average surface height that corresponds to an integer number of monolayers; and

performing an anneal that reduces atomic roughness on a free surface of the grown layer.

11. The method of claim 10, comprising:

epitaxially growing a layer of a second semiconductor on the annealed layer; and

wherein the substrate is a third semiconductor.

12. The method of claim 11, wherein the first semiconductor is a different semiconductor than the second and third semiconductors.

13. The method of claim 12,

wherein the first semiconductor is a group III/V semiconductor;

and

wherein the growing of a layer of a first semiconductor includes growing the layer of the first semiconductor along one of a 110-type crystal axis of the group III/V semiconductor and a 111-type crystal axis of the group III/V semiconductor.

14. The method of claim 10, further comprising:

cleaving a crystalline substrate to form an edge surface; and

wherein the epitaxially growing causes the semiconductor layer to grow on the edge surface.

15. The method of claim 10, further comprising:

stopping the growing in response to a peak in a specular reflection intensity from a free surface of the layer.

16. The method of claim 10, wherein the stopping the growing is responsive to a measurement indicating that an average surface height of the layer of a first semiconductor corresponds to an integer number of atomic monolayers.

17. An apparatus, comprising:

a quantum well structure having first and second barrier semiconductor structures and a well semiconductor layer that has atomically smooth interfaces with the barrier semiconductor layers; and

wherein one of a 110-type crystal axis and a 111-type crystal axis of the well layer is perpendicular to the interfaces.

18. The apparatus of claim 17, wherein the well layer comprises a group III/IV semiconductor.

19. The apparatus of claim 18, further comprising:

electrical contacts positioned to pump the quantum well structure with an electrical current; and

a window capable of emitting light produced by the quantum well structure in response to being pumped by the electric current.

20. The apparatus of claim 19, wherein the structures and semiconductor layers form a AlGaAs/GaAs/AlGaAs structure.