Multi-trench region for accumulation of photo-generated charge in a CMOS imager

• US 20040178323A1
• Filed: 02/27/2004
• Published: 09/16/2004
• Est. Priority Date: 08/28/2000
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Micron Technology, Inc.
• Inventors: Rhodes, Howard E.
• Granted Patent: US 6,838,742 B2
• Time in Patent Office: Days
• US Class Current: 250/214.1
• CPC Class Codes: H01L 27/14601 Structural or functional details thereof
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14687 Wafer level processing
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: H01L 31/035281 Shape of the body
• CPC Class Codes: H01L 31/03529 Shape of the potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/103 the potential barrier being of the PN homojunction type
• CPC Class Codes: Y02E 10/50 Photovoltaic [PV] energy

Abstract

A multiple-trench photosensor for use in a CMOS imager having an improved charge capacity. The multi-trench photosensor may be either a photogate or photodiode structure. The multi-trench photosensor provides the photosensitive element with an increased surface area compared to a flat photosensor occupying a comparable area on a substrate. The multi-trench photosensor also exhibits a higher charge capacity, improved dynamic range, and a better signal-to-noise ratio. Also disclosed are processes for forming the multi-trench photosensor.

Claims

1. A photosensor for use in an imaging device, said photosensor comprising:

a doped layer of a first conductivity type formed in a substrate;

a plurality of trenches formed in said doped layer, each of said plurality of trenches having a plurality of sidewalls and a bottom;

a doped region of a second conductivity type formed at the sidewalls and bottom of each of said plurality of trenches; and

an insulating layer formed over said doped region.

2. The photosensor of claim 1, wherein the photosensor is a photodiode sensor.

3. The photosensor of claim 2, wherein the insulating layer has a thickness of at least 30 Angstroms.

4. The photosensor of claim 1, wherein each of said plurality of trenches has a depth within the range of approximately 0.05 to 10 μ

m.

5. The photosensor of claim 1, wherein said plurality of trenches comprises two trenches.

6. The photosensor of claim 1, further comprising a conductive layer formed on substantially all of an upper surface of said insulating layer for gating the collection of charges in said doped region.

7. The photosensor of claim 6, wherein the insulating layer has a thickness within the range of approximately 20 to 500 Angstroms.

8. The photosensor of claim 6, wherein the photosensor is a photogate sensor.

9. The photosensor of claim 6, wherein the conductive layer is a doped polysilicon layer.

10. The photosensor of claim 6, wherein the conductive layer is a layer of indium tin oxide.

11. The photosensor of claim 6, wherein the conductive layer is a layer of tin oxide.

12. The photosensor of claim 6, wherein the conductive layer is a doped layer of a second conductivity type.

13. The photosensor of claim 6, wherein the conductive layer is substantially transparent to light radiation.

14. The photosensor of claim 6, wherein the conductive layer has a thickness within the range of approximately 200 to 4000 Angstroms.

15. The photosensor of claim 1, wherein the insulating layer is a silicon dioxide layer.

16. The photosensor of claim 1, wherein the insulating layer is a silicon nitride layer.

17. The photosensor of claim 1, wherein the insulating layer is a layer of ONO.

18. The photosensor of claim 1, wherein the insulating layer is a layer of ON.

19. The photosensor of claim 1, wherein the insulating layer is a layer of NO.

20. The photosensor of claim 1, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

21. The photosensor of claim 1, wherein the doped region is formed by a process of multiple angled ion implantation.

22. The photosensor of claim 21, wherein the process comprises four orthogonal angled implants at a dose of 1×

10¹² to 1×

10¹⁶ ions/cm², wherein a resist is placed on top of the substrate while implanting, and wherein the angle of implantation for each angled implant is greater than θ

_c, where tan θ

_c=[(t+d)/(w)], where t is the thickness of the resist, d is the depth of said plurality of trenches, and w is the width of said plurality of trenches.

23. The photosensor of claim 22, wherein the dose of each implant is 1×

10¹³ to 1×

10¹⁵ ions/cm².

24. The photosensor of claim 21, wherein the dose of each implant is 5×

10¹³ ions/cm².

25. A photogate sensor for use in an imaging device, said photogate sensor comprising:

a doped layer of a first conductivity type formed in a substrate;

a plurality of trenches formed in said doped layer, each of said plurality of trenches having a plurality of sidewalls and a bottom;

a doped region of a second conductivity type formed at the sidewalls and bottom of each of said plurality of trenches;

an insulating layer formed on substantially all of an upper surface of said doped region; and

a light radiation-transparent electrode formed on substantially all of an upper surface of said insulating layer for gating the collection of charges in said doped region.

26. The photogate sensor of claim 25, wherein each of said plurality of trenches has a depth within the range of approximately 0.05 to 10 μ

m.

27. The photogate sensor of claim 25, wherein said plurality of trenches comprises two trenches.

28. The photogate sensor of claim 25;

wherein the first conductivity type is p-type, and the second conductivity type is n-type.

29. The photogate sensor of claim 25, wherein the insulating layer has a thickness within the range of approximately 20 to 500 Angstroms.

30. The photogate sensor of claim 25, wherein the insulating layer is a layer of silicon dioxide.

31. The photogate sensor of claim 25, wherein the insulating layer is a layer of silicon nitride.

32. The photogate sensor of claim 25, wherein the insulating layer is a layer of ONO.

33. The photogate sensor of claim 25, wherein the insulating layer is a layer of ON.

34. The photogate sensor of claim 25, wherein the insulating layer is a layer of NO.

35. The photogate sensor of claim 25, wherein the radiation-transparent electrode has a thickness within the range of approximately 200 to 4000 Angstroms thick.

36. The photogate sensor of claim 25, wherein the radiation-transparent electrode is a layer of doped polysilicon.

37. The photogate sensor of claim 25, wherein the radiation-transparent electrode is a layer of indium tin oxide.

38. The photogate sensor of claim 25, wherein the radiation-transparent electrode is a layer of tin oxide.

39. The photogate sensor of claim 25, wherein the radiation-transparent electrode is doped to a second conductivity type.

40. The photogate sensor of claim 39, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

41. The photogate sensor of claim 25, wherein the doped region is formed by a process of multiple angled ion implantation.

42. The photogate sensor of claim 41, wherein the process comprises four orthogonal angled implants at a dose of 1×

10¹² to 1×

10¹⁶ ions/cm², wherein a resist is placed on top of the substrate while implanting, and wherein the angle of implantation for each angled implant is greater than θ

_c, where tan θ

_c=[(t+d)/(½

w)], where t is the thickness of the resist, d is the depth of said plurality of trenches, and w is the width of said plurality of trenches.

43. The photogate sensor of claim 42, wherein the dose of each implant is 1×

10¹³ to 1×

10¹⁵ ions/cm².

44. The photogate sensor of claim 42, wherein the dose of each implant is 5×

10¹³ ions/cm².

45. A photodiode sensor for use in an imaging device, said photodiode sensor comprising:

a doped layer of a first conductivity type formed in a substrate;

a plurality of trenches formed in said doped layer, each of said plurality of trenches having a plurality of sidewalls and a bottom, each of said plurality of trenches having a depth within the range of approximately 0.05 to 10 μ

m; and

a doped region of a second conductivity type formed at the sidewalls and bottom of each of said plurality of trenches.

46. The photodiode sensor of claim 45, wherein the first conductivity type is p-type and the second conductivity type is n-type.

47. The photodiode sensor of claim 45, wherein the doped region is formed by a process of multiple angled ion implantation.

48. The photodiode sensor of claim 47, wherein the process comprises four orthogonal angled implants at a dose of 1×

10¹² to 1×

10¹⁶ ions/cm², wherein a resist is placed on top of the substrate while implanting, and wherein the angle of implantation for each angled implant is greater than θ

_c, where tan θ

_c=[(t+d)/(w)], where t is the thickness of the resist, d is the depth of said plurality of trenches, and w is the width of said plurality of trenches.

49. The photodiode sensor of claim 48, wherein the dose of each implant is 1×

10¹³ to 1×

10¹⁵ ions/cm².

50. The photodiode sensor of claim 48, wherein the dose of each implant is 5×

10¹³ ions/cm².

51. The photodiode sensor of claim 45, wherein said plurality of trenches comprises two trenches.

63. The pixel sensor cell of claim 51, wherein said insulating layer extends over the top surface of the transfer gate.

52. A pixel sensor cell for use in an imaging device, said pixel sensor cell comprising:

a doped layer of a first conductivity type formed in a substrate;

a plurality of trenches formed in said doped layer, each of said plurality of trenches having a plurality of sidewalls and a bottom;

a first doped region of a second conductivity type formed at the sidewalls and bottom of each of said plurality of trenches;

an insulating layer formed over said first doped region;

a second doped region of a second conductivity type formed in said doped layer and positioned to receive charges from said first doped region of said plurality of trenches; and

a reset transistor formed at the doped layer for periodically resetting a charge level of said second doped region, said second doped region being the source of said reset transistor.

53. The pixel sensor cell of claim 52, wherein the pixel sensor cell is a photodiode sensor cell.

54. The pixel sensor cell of claim 53, wherein the insulating layer has a thickness of at least 30 Angstroms.

55. The pixel sensor cell of claim 52, further comprising a conductive layer formed on substantially all of an upper surface of said insulating layer for gating the collection of charges in said first doped region.

56. The pixel sensor cell of claim 55, wherein the insulating layer has a thickness within the range of approximately 20 to 500 Angstroms.

57. The pixel sensor cell of claim 55, wherein said conductive layer is a layer of indium tin oxide.

58. The pixel sensor cell of claim 55, wherein said conductive layer is a layer of tin oxide.

59. The pixel sensor cell of claim 55, wherein said conductive layer is a layer of doped polysilicon.

60. The pixel sensor cell of claim 55, wherein the pixel sensor cell is a photogate sensor cell.

61. The pixel sensor cell of claim 55, further comprising a transfer gate formed on the doped layer between said plurality of trenches and the second doped region.

62. The pixel sensor cell of claim 61, wherein said conductive layer extends over a top surface of the transfer gate.

64. The pixel sensor cell of claim 55, wherein said conductive layer is substantially transparent to radiation.

65. The pixel sensor cell of claim 55, wherein said conductive layer is a layer of doped polysilicon.

66. The pixel sensor cell of claim 52, wherein said insulating layer is a layer of silicon dioxide.

67. The pixel sensor cell of claim 52, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

68. The pixel sensor cell of claim 52, wherein the first doped region is formed by a process of multiple angled ion implantation.

69. The pixel sensor cell of claim 68, wherein the process comprises four orthogonal angled implants at a dose of 1×

10¹² to 1×

10¹⁶ ions/cm², wherein a resist is placed on top of the substrate while implanting, and wherein the angle of implantation for each angled implant is greater than θ

_c, where tan θ

_c=[(t+d)/(w)], where t is the thickness of the resist, d is the depth of said plurality of trenches, and w is the width of said plurality of trenches.

70. The pixel sensor cell of claim 69, wherein the dose of each implant is 1×

10¹³ to 1×

10¹⁵ ions/cm².

71. The pixel sensor cell of claim 69, wherein the dose of each implant is 5×

10¹³ ions/cm².

72. The pixel sensor cell of claim 52, wherein said plurality of trenches comprises two trenches.

73. A pixel sensor cell for use in an imaging device, said pixel sensor cell comprising:

a doped layer of a first conductivity type formed in a substrate;

a plurality of trenches formed in said doped layer, each of said plurality of trenches having a plurality of sidewalls and a bottom;

a photodiode formed in each of said plurality of trenches, wherein said photodiode comprises a first doped region of a second conductivity type formed at the sidewalls and bottom of each of aid plurality of trenches, and an insulating layer formed on an upper surface of said first doped region;

a second doped region of a second conductivity type formed in said doped layer and positioned to receive charges from said first doped region of each of said plurality of trenches; and

a reset transistor formed at the doped layer for periodically resetting a charge level of said second doped region, said second doped region being the source of said reset transistor.

74. A pixel sensor cell for use in an imaging device, said pixel sensor cell comprising:

a doped layer of a first conductivity type formed in a substrate;

a plurality of trenches formed in said doped layer, each of said plurality of trenches having a plurality of sidewalls and a bottom;

a photogate formed in each of said plurality of trenches, wherein said photogate comprises a first doped region of a second conductivity type formed at the sidewalls and bottom of each of said plurality of trenches, a conductive layer formed on substantially all of an upper surface of said first doped region for gating the collection of charges in said first doped region, and an insulating layer formed between said first doped region and said conductive layer;

a second doped region of a second conductivity type formed in said doped layer and positioned to receive charges from said first doped region of each of said plurality of trenches; and

a reset transistor formed at the doped layer for periodically resetting a charge level of said second doped region, said second doped region being the source of said reset transistor.

75. A pixel sensor cell for use in an imaging device, said pixel sensor cell comprising:

a plurality of trench photosensors formed in a doped layer of a first conductivity type of a substrate;

a reset transistor formed in said doped layer;

a floating diffusion region of a second conductivity type formed in said doped layer between said plurality of trench photosensors and the reset transistor for receiving charges from said plurality of trench photosensors, said reset transistor operating to periodically reset a charge level of said floating diffusion region; and

an output transistor having a gate electrically connected to the floating diffusion region.

76. The pixel sensor cell of claim 75, wherein each of said plurality of trench photosensors further comprises a doped region of a second conductivity type located on the sidewalls and bottom of each of said plurality of trenches.

77. The pixel sensor cell of claim 75, wherein each of said plurality of trench photosensors is a photodiode sensor.

78. The pixel sensor cell of claim 75, further comprising a transfer gate located between the plurality of trench photosensors and the floating diffusion region.

79. The pixel sensor cell of claim 78, wherein each of said plurality of trench photosensors is a photogate sensor.

80. The pixel sensor cell of claim 75, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

81. The pixel sensor cell of claim 75, wherein said plurality of trench photosensors comprises two trench photosensors.

82. A CMOS imager comprising:

a substrate having a doped layer of a first conductivity type;

an array of pixel sensor cells formed in said doped layer, wherein each pixel sensor cell has a plurality of trench photosensors; and

signal processing circuitry electrically connected to receive and process output signals from said array.

83. The CMOS imager of claim 82, wherein each of said plurality of trench photosensors further comprises a doped region of a second conductivity type located on the sidewalls and bottom of each of said plurality of trenches.

84. The CMOS imager of claim 83, wherein the second conductivity type is n-type.

85. The CMOS imager of claim 82, wherein each of said plurality of trench photosensors is a photodiode sensor.

86. The CMOS imager of claim 82, wherein each of said plurality of trench photosensors is a photogate sensor.

87. The CMOS imager of claim 82, wherein the first conductivity type is p-type.

88. An integrated circuit imager comprising:

an array of pixel sensor cells formed in a substrate, wherein each pixel sensor cell has a plurality of trench photosensors;

signal processing circuitry formed in said substrate and electrically connected to the array for receiving and processing signals representing an image output by the array and for providing output data representing said image; and

a processor for receiving and processing data representing said image.

89. An integrated circuit imager comprising:

a CMOS imager, said CMOS imager comprising an array of pixel sensor cells formed in a doped layer on a substrate, wherein each pixel sensor cell has a plurality of trench photosensors with a first doped region formed therein, each of said cells having a respective second doped region for receiving and outputting image charge received from said first doped region, and signal processing circuitry formed in said substrate and electrically connected to the array for receiving and processing signals representing an image output by the array and for providing output data representing said image; and

a processor for receiving and processing data representing said image.

90. A method of forming a photosensor, comprising the steps of:

providing a semiconductor substrate having a doped layer of a first conductivity type;

forming a plurality of trenches in said doped layer, each of said plurality of trenches having a plurality of sidewalls and a bottom;

doping the sides and bottom of each of said plurality of trenches to form a doped region of a second conductivity type; and

forming an insulating layer on the sides and bottom of each of said plurality of trenches over said doped region.

91. The method of claim 90, wherein the photosensor is a photodiode sensor.

92. The method of claim 90, further comprising a step of forming a conductive layer on substantially all of an upper surface of the insulating layer.

93. The method of claim 92, wherein the photosensor is a photogate sensor.

94. The method of claim 92, wherein the step of forming said conductive layer comprises a chemical vapor deposition step.

95. The method of claim 92, wherein the step of forming said conductive layer comprises a sputtering step.

96. The method of claim 90, wherein said insulating layer is a layer of silicon dioxide.

97. The method of claim 90, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

98. The method of claim 90, wherein the semiconductor substrate is a silicon substrate.

99. The method of claim 90, wherein the step of forming a plurality of trenches comprises a reactive ion etching process.

100. The method of claim 90, wherein the step of forming a plurality of trenches comprises forming two trenches.

101. The method of claim 90, wherein the doping step comprises ion implantation.

102. The method of claim 101, wherein the doping step comprises multiple angled ion implantation.

103. The method of claim 102, wherein the multiple angled ion implantation comprises four orthogonal angled implants at a dose of 1×

10¹² to 1×

10¹⁶ ions/cm², wherein a resist is placed on top of the substrate while implanting, and wherein the angle of implantation for each angled implant is greater than θ

_c, where tan θ

_c=[(t+d)/(w)], where t is the thickness of the resist, d is the depth of said plurality of trenches, and w is the width of said plurality of trenches.

104. The method of claim 103, wherein the dose of each implant is 1×

10¹³ to 1×

10¹⁵ ions/cm².

105. The method of claim 103, wherein the dose of each implant is 5×

10¹³ ions/cm².

106. A method of forming a photosensor, comprising the steps of:

providing a semiconductor substrate having a doped layer of a first conductivity type;

forming a doped region of a second conductivity type in the doped layer;

forming a plurality of trenches in said doped region so that the sides and bottom of each of said plurality of trenches are of the second conductivity type; and

forming an insulating layer on the sides and bottom of each of said plurality of trenches.

107. The method of claim 106, wherein the photosensor is a photodiode sensor.

108. The method of claim 106, further comprising forming a conductive layer on the sides and bottom of each of said plurality of trenches, and wherein the photosensor is a photogate sensor.

109. The method of claim 106, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

110. The method of claim 106, wherein the step of forming a plurality of trenches comprises a reactive ion etching process.

111. The method of claim 106, wherein the doping step comprises ion implantation.

112. A method of forming a photosensor, comprising the steps of:

providing a semiconductor substrate having a doped layer of a first conductivity type;

forming a plurality of trenches in said doped region, each of said plurality of trenches having a plurality of sidewalls and a bottom doped to a second conductivity type; and

forming an insulating layer on the sides and bottom of each of said plurality of trenches.

113. The method of claim 112, wherein the photosensor is a photodiode sensor.

114. The method of claim 112, further comprising forming a conductive layer on the sides and bottom of each of said plurality of trenches, and wherein the photosensor is a photogate sensor.

115. The method of claim 112, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

116. The method of claim 112, wherein the step of forming a plurality of trenches comprises a reactive ion etching process.