Transposition circuit
First Claim
1. A transposition circuit for generating data packets arranged as a transposed matrix and obtained from data packets in the form of an N×
- N matrix (where N is an integer of 2 or greater) by interchanging the rows and columns of the original matrix, wherein N input terminals and N output terminals are provided; and
N packets of data are outputted in parallel for each matrix column from said output terminals when N packets of data are inputted in parallel for each matrix row to said input terminals.
2 Assignments
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Accused Products
Abstract
The transposition circuit comprises N input terminals (where N is an integer of 2 or greater) and N output terminals. This transposition circuit is configured such that when N packets of data for each matrix row are inputted in parallel to the corresponding input terminals, N packets of data are outputted in parallel for each matrix column from the corresponding output terminals. This transposition circuit generates data packets arranged as a transposed matrix and obtained from data packets in the form of an N×N matrix by interchanging the rows and columns of the original matrix.
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Citations
4 Claims
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1. A transposition circuit for generating data packets arranged as a transposed matrix and obtained from data packets in the form of an N×
- N matrix (where N is an integer of 2 or greater) by interchanging the rows and columns of the original matrix, wherein N input terminals and N output terminals are provided; and
N packets of data are outputted in parallel for each matrix column from said output terminals when N packets of data are inputted in parallel for each matrix row to said input terminals. - View Dependent Claims (2, 3, 4)
- N matrix (where N is an integer of 2 or greater) by interchanging the rows and columns of the original matrix, wherein N input terminals and N output terminals are provided; and
Specification