Integrated circuit with improved channel stress properties and a method for making it
First Claim
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1. An integrated circuit comprising:
- a PMOS transistor and an NMOS transistor formed on a semiconductor substrate;
a silicate glass layer formed on only the PMOS transistor or the NMOS transistor; and
an etch stop layer formed on the silicate glass layer.
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Abstract
An integrated circuit is described that comprises a PMOS transistor and an NMOS transistor that are formed on a semiconductor substrate. A silicate glass layer is formed on only the PMOS transistor or the NMOS transistor; and an etch stop layer is formed on the silicate glass layer. Also described is a method for forming an integrated circuit. That method comprises forming a PMOS transistor structure and an NMOS transistor structure on a semiconductor substrate, forming a silicate glass layer on only the PMOS transistor structure or the NMOS transistor structure, and forming an etch stop layer on the silicate glass layer.
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Citations
20 Claims
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1. An integrated circuit comprising:
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a PMOS transistor and an NMOS transistor formed on a semiconductor substrate;
a silicate glass layer formed on only the PMOS transistor or the NMOS transistor; and
an etch stop layer formed on the silicate glass layer. - View Dependent Claims (2, 3, 4, 5)
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6. An integrated circuit comprising:
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a PMOS transistor and an NMOS transistor formed on a semiconductor substrate, the NMOS transistor having a gate electrode that has a top surface, a first side surface and a second side surface;
a silicate glass layer formed on only the PMOS transistor; and
an etch stop layer formed on the silicate glass layer and along the first side surface and the second side surface of the gate electrode, but not formed on the top surface of the gate electrode. - View Dependent Claims (7, 8)
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9. A method for forming an integrated circuit comprising:
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forming a PMOS transistor structure and an NMOS transistor structure on a semiconductor substrate;
forming a silicate glass layer on only the PMOS transistor structure or the NMOS transistor structure; and
forming an etch stop layer on the silicate glass layer. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A method for forming an integrated circuit comprising:
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forming a PMOS transistor structure and an NMOS transistor structure on a semiconductor substrate, the NMOS transistor structure having a gate electrode that has a top surface, a first side surface and a second side surface;
forming a silicate glass layer on only the PMOS transistor structure;
forming an etch stop layer on the silicate glass layer and along the first side surface and the second side surface of the gate electrode, and on the top surface of the gate electrode; and
removing the etch stop layer from the top surface of the gate electrode. - View Dependent Claims (17, 18, 19, 20)
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Specification