Technique for evaluating a fabrication of a semiconductor component and wafer
First Claim
1. A method for evaluating a fabrication of at least a portion of a wafer, the method comprising:
- when the wafer is in a partially fabricated state, determining, at a plurality of locations on an active area of a die of the wafer, a value of a specified performance parameter, wherein the specified performance parameter is known to be indicative of a particular fabrication process in the fabrication; and
obtaining evaluation information based on a variance of the value of the performance parameter at the plurality of locations, wherein the step of obtaining evaluation information is performed without affecting a usability of a chip that is created from the die, and wherein the evaluation information is for evaluating how one or more processes that include the particular fabrication process in the fabrication of the wafer were performed.
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Abstract
The fabrication of the wafer may be analyzed starting from when the wafer is in a partially fabricated state. The value of a specified performance parameter may be determined at a plurality of locations on an active area of a die of the wafer. The specified performance parameter is known to be indicative of a particular fabrication process in the fabrication. Evaluation information may then be obtained based on a variance of the value of the performance parameter at the plurality of locations. This may be done without affecting a usability of a chip that is created from the die. The evaluation information may be used to evaluate how one or more processes that include the particular fabrication process that was indicated by the performance parameter value was performed.
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Citations
33 Claims
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1. A method for evaluating a fabrication of at least a portion of a wafer, the method comprising:
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when the wafer is in a partially fabricated state, determining, at a plurality of locations on an active area of a die of the wafer, a value of a specified performance parameter, wherein the specified performance parameter is known to be indicative of a particular fabrication process in the fabrication; and
obtaining evaluation information based on a variance of the value of the performance parameter at the plurality of locations, wherein the step of obtaining evaluation information is performed without affecting a usability of a chip that is created from the die, and wherein the evaluation information is for evaluating how one or more processes that include the particular fabrication process in the fabrication of the wafer were performed. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 25)
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21. A method for evaluating a fabrication of a wafer, the method comprising:
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distributing a first set of test structures to one or more first locations on the wafer;
while the wafer is in a partially fabricated step, performing the following steps;
activating each of the test structures in the first set;
measuring electrical activity at each of the one or more first locations;
evaluating one or more steps in the fabrication of the wafer by comparing one or more values determined from the electrical activity measured at the one or more first locations to determine a variation in a result of one or more fabrication steps. - View Dependent Claims (22, 23, 24, 26, 27, 28, 29, 30, 31, 32)
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33. An apparatus comprising a computer readable medium, wherein the computer readable medium contains instructions for evaluating a fabrication of at least a portion of a wafer when the wafer is in a partially fabricated state, wherein at least some of the instructions are executable to enable the apparatus to perform steps comprising:
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determining, at a plurality of locations on an active area of a die, a value of a specified performance parameter, wherein the specified performance parameter is known to be indicative of a result of one or more fabrication steps in the fabrication;
determining a variance of the value of the performance parameter at the plurality of locations; and
obtaining evaluation information based on the variance of the value of the performance parameter, wherein the step of obtaining evaluation information is performed without affecting a usability of a chip that is created from the die, and wherein the evaluation information is for evaluating how the one or more fabrication steps were performed.
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Specification