Optimizing write/erase operations in memory devices
First Claim
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1. A method of controlling write/erase operations in a memory device including memory blocks, said blocks being exposed to wear as a result of repeated erasures, the method comprising:
- storing erase counts of said memory blocks, each erase count reflecting the number of erasures of an associated one of the memory blocks;
creating a chain storing the erase counts of said memory blocks that are available for writing at a certain instant of time; and
selecting for writing, out of the blocks of said memory device available for writing, the block having the lowest erase count in said chain.
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Abstract
A method controls write/erase operations in a memory device including memory blocks that are exposed to wear as a result of repeated erasures. The method includes: storing the erase counts of the memory blocks, creating a chain storing the erase counts of the memory blocks that are available for writing at a certain instant of time, and selecting for writing, out of the blocks in the memory device available for writing, the block having the lowest erase count in the chain.
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Citations
31 Claims
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1. A method of controlling write/erase operations in a memory device including memory blocks, said blocks being exposed to wear as a result of repeated erasures, the method comprising:
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storing erase counts of said memory blocks, each erase count reflecting the number of erasures of an associated one of the memory blocks;
creating a chain storing the erase counts of said memory blocks that are available for writing at a certain instant of time; and
selecting for writing, out of the blocks of said memory device available for writing, the block having the lowest erase count in said chain. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A computer system, comprising:
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a memory device including memory blocks that are exposed to wear as a result of repeated erasures;
storing means for storing erase counts of the memory blocks, each erase count reflecting the number of erasures of an associated one of the memory blocks;
means for creating a chain storing the erase counts of the memory blocks that are available for writing at a certain instant of time; and
means for selecting for writing, out of the blocks of the memory device available for writing, the block having the lowest erase count in the chain. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25)
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26. A computer product for controlling write/erase operations in a memory device including memory blocks that are exposed to wear as a result of repeated erasures, the computer product being loadable into a memory of a digital computer and comprising instruction code portions for performing, when the product is run on a computer, the following operations:
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storing erase counts of the memory blocks, each erase count reflecting the number of erasures of an associated one of the memory blocks;
creating a chain storing the erase counts of the memory blocks that are available for writing at a certain instant of time; and
selecting for writing, out of the blocks of the memory device available for writing, the block having the lowest erase count in the chain. - View Dependent Claims (27, 28, 29, 30, 31)
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Specification