Last line of defense ensuring and enforcing sufficiently valid/current code
First Claim
1. A computer configured for self-validation comprising:
- a processor;
a memory coupled to the processor; and
a validation circuit coupled to the processor and the memory, the validation circuit operational to validate a characteristic of the computer and further operational to restrict the function of the computer when the validation fails.
3 Assignments
0 Petitions
Accused Products
Abstract
A computer is adapted for self-validation using a dedicated validation circuit or process. The validation circuit may include a timing circuit for activating the validation process, a verification circuit for verifying the computer is in compliance with a pre-determined set of conditions and an enforcement circuit for imposing a sanction on the computer when the computer is found in a non-compliant state. The validation circuit may include cryptographic circuitry or processes for hashing and digital signature verification. The validation circuit is preferable small and portable to help ensure that the validation circuit itself is not vulnerable to a widespread attack. A self-validation method for use by a computer is also disclosed.
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Citations
20 Claims
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1. A computer configured for self-validation comprising:
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a processor;
a memory coupled to the processor; and
a validation circuit coupled to the processor and the memory, the validation circuit operational to validate a characteristic of the computer and further operational to restrict the function of the computer when the validation fails. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A validation circuit in a computer, the validation circuit comprising:
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a triggering circuit;
a logic circuit coupled to the triggering circuit;
the logic circuit for verifying a characteristic of the computer; and
an enforcement circuit coupled to the verification circuit;
wherein the enforcement circuit, in response to a signal from the logic circuit, limits the performance of the computer. - View Dependent Claims (10, 11, 12, 13)
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14. A method for authenticating a computer comprising:
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providing a validation circuit;
programming the validation circuit with information corresponding to a characteristic of the computer;
programming the validation circuit to activate at an interval;
validating the characteristic of the computer; and
limiting a function of the computer when the validating the characteristic of the computer fails. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification