Thin-film transistor array, method of fabricating the same, and liquid crystal display device including the same

• US 20080035920A1
• Filed: 08/07/2007
• Published: 02/14/2008
• Est. Priority Date: 08/09/2006
• Status: Active Grant

• Current Assignee: NLT Technologies, Ltd.
• Original Assignee: NEC Corporation, NEC LCD Technologies Limited (NEC Corporation)
• Inventors: Takechi, Kazushige, Nakata, Mitsuru
• Granted Patent: US 7,804,091 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A thin-film transistor array includes an electrically insulating substrate, a plurality of thin-film transistors arranged in a matrix on the substrate, and each including a channel, a source, and a drain each comprised of an oxide-semiconductor film, a pixel electrode integrally formed with the drain, a source signal line through which a source signal is transmitted to a group of thin-film transistors, a gate signal line through which a gate signal is transmitted to a group of thin-film transistors, a source terminal formed at an end of the source signal line, and a gate terminal formed at an end of the gate signal line. The source terminal and the gate terminal are formed in the same layer as a layer in which the channel is formed. The source terminal and the gate terminal have the same electric conductivity as that of the pixel electrode.

Claims

1. A thin-film transistor array comprising:

an electrically insulating substrate;

a plurality of thin-film transistors arranged in a matrix on said electrically insulating substrate, and each including a channel, a source, and a drain each comprised of an oxide-semiconductor film;

a pixel electrode integrally formed with said drain;

a source signal line through which a source signal is transmitted to a group of thin-film transistors among said plurality of thin-film transistors;

a gate signal line through which a gate signal is transmitted to a group of thin-film transistors among said plurality of thin-film transistors;

a source terminal formed at an end of said source signal line; and

a gate terminal formed at an end of said gate signal line,

said source terminal and said gate terminal being formed in the same layer as a layer in which said channel is formed,

said source terminal and said gate terminal having the same electric conductivity as that of said pixel electrode.

2. The thin-film transistor array as set forth in claim 1, wherein at least a part of each of said source and drain, said pixel electrode, said source terminal, and said gate terminal is comprised of a low-resistivity area having a resistivity which is equal to or greater than 1/10¹⁰, but equal to or smaller than 1/10² of a resistivity of said channel in equilibrium state in which no voltage is applied to said channel.

3. The thin-film transistor array as set forth in claim 1, wherein said oxide-semiconductor film is composed of amorphous oxide containing at least one of Zn, Ga and In.

4. The thin-film transistor array as set forth in claim 1, wherein said oxide-semiconductor film is composed of crystalline oxide containing at least one of Zn, Ga and In.

5. The thin-film transistor array as set forth in claim 1, wherein said oxide-semiconductor film is composed of mixed crystal including both amorphous oxide containing at least one of Zn, Ga and In, and polycrystal oxide.

6. The thin-film transistor array as set forth in claim 5, wherein said crystalline oxide is formed by crystallizing amorphous oxide with laser irradiation thereto.

7. The thin-film transistor array as set forth in claim 1, wherein said oxide-semiconductor film is formed by dissolving powdered oxide semiconductor into solvent, coating or printing said solvent onto an object, and heating said solvent to vaporize said solvent.

8. The thin-film transistor array as set forth in claim 1, wherein said electrically insulating substrate is comprised of a resin substrate.

30. A liquid crystal display device including a thin-film transistor array defined in claim 1.

9. A thin-film transistor array comprising:

an electrically insulating substrate;

a plurality of thin-film transistors arranged in a matrix on said electrically insulating substrate, and each including a channel, a source and a drain each comprised of an oxide-semiconductor film;

a pixel electrode integrally formed with said drain;

a source signal line through which a source signal is transmitted to thin-film transistors located on a common column;

a gate signal line through which a gate signal is transmitted to thin-film transistors located on a common row;

a source terminal formed at an end of said source signal line; and

a gate terminal formed at an end of said gate signal line,

said pixel electrode, said source terminal and said gate terminal being comprised of an oxide-semiconductor film composed of oxide semiconductor which is identical with oxide semiconductor of which said oxide-semiconductor film defining said channel and said source and drain is composed.

10. The thin-film transistor array as set forth in claim 9, wherein at least a part of each of said source and drain, said pixel electrode, said source terminal, and said gate terminal is comprised of a low-resistivity area having a resistivity which is equal to or greater than 1/10¹⁰, but equal to or smaller than 1/10² of a resistivity of said channel in equilibrium state in which no voltage is applied to said channel.

11. The thin-film transistor array as set forth in claim 9, wherein said oxide-semiconductor film is composed of amorphous oxide containing at least one of Zn, Ga and In.

12. The thin-film transistor array as set forth in claim 9, wherein said oxide-semiconductor film is composed of crystalline oxide containing at least one of Zn, Ga and In.

13. The thin-film transistor array as set forth in claim 9, wherein said oxide-semiconductor film is composed of mixed crystal including both amorphous oxide containing at least one of Zn, Ga and In, and polycrystal oxide.

14. The thin-film transistor array as set forth in claim 13, wherein said crystalline oxide is formed by crystallizing amorphous oxide with laser irradiation thereto.

15. The thin-film transistor array as set forth in claim 9, wherein said oxide-semiconductor film is formed by dissolving powdered oxide semiconductor into solvent, coating or printing said solvent onto an object, and heating said solvent to vaporize said solvent.

16. The thin-film transistor array as set forth in claim 9, wherein said electrically insulating substrate is comprised of a resin substrate.

31. A liquid crystal display device including a thin-film transistor array defined in claim 9.

17. A method of fabricating a thin-film transistor array, comprising:

forming an oxide-semiconductor film;

patterning said oxide-semiconductor film into a channel, a source and a drain of a thin-film transistor, a pixel electrode, a gate terminal, and a source terminal; and

exposing at least a part of each of said source, said drain, said pixel electrode, said source terminal, and said gate terminal to one of reducing plasma and plasma containing at least one of B, Al, Ga, In and F for reducing a resistivity of said part.

18. The method as set forth in claim 17, wherein said part is exposed to said reducing plasma to render a resistivity of said part equal to or greater than 1/10¹⁰, but equal to or smaller than 1/10² of a resistivity of said channel in equilibrium state in which no voltage is applied to said channel.

19. The method as set forth in claim 17, wherein said reducing plasma is comprised of at least one of rare gas plasma, hydrogen gas plasma and nitrogen gas plasma.

32. A liquid crystal display device including a thin-film transistor array fabricated in accordance with a method defined in claim 17.

20. A method of fabricating a thin-film transistor array, comprising:

forming an oxide-semiconductor film;

patterning said oxide-semiconductor film into a channel, a source and a drain of a thin-film transistor, a pixel electrode, a gate terminal, and a source terminal; and

doping at least one of B, Al, Ga, In and F into at least a part of each of said source, said drain, said pixel electrode, said source terminal, and said gate terminal for reducing a resistivity of said part.

21. The method as set forth in claim 20, wherein at least one of B, Al, Ga, In and F is doped into said part to render a resistivity of said part equal to or greater than 1/10¹⁰, but equal to or smaller than 1/10² of a resistivity of said channel in equilibrium state in which no voltage is applied to said channel.

33. A liquid crystal display device including a thin-film transistor array fabricated in accordance with a method defined in claim 20.

22. A method of fabricating a thin-film transistor array, comprising, in sequence:

forming a first electrically conductive film on an electrically insulating substrate;

patterning said first electrically conductive film into a gate signal line;

forming a gate insulating film;

etching for removal a portion of said gate insulating film located above a portion of said gate signal line to thereby form a gate terminal contact hole;

forming an oxide-semiconductor film;

patterning said oxide-semiconductor film into a channel, a source and a drain of a thin-film transistor, a pixel electrode, a gate terminal located above said gate terminal contact hole, and a source terminal;

forming a second electrically conductive film;

patterning said second electrically conductive film into a source signal line electrically connected to said source terminal;

forming a protection insulating film;

etching for removal portions of said protection insulating film located above said gate terminal, said source terminal, said source, said drain, and said pixel electrode to thereby form a gate/source terminal contact hole and an opening; and

exposing a resultant to one of reducing plasma and plasma containing at least one of B, Al, Ga, In and F.

23. The method as set forth in claim 22, wherein said electrically insulating substrate is comprised of a resin substrate.

34. A liquid crystal display device including a thin-film transistor array fabricated in accordance with a method defined in claim 22.

24. A method of fabricating a thin-film transistor array, comprising, in sequence:

forming a first electrically conductive film on an electrically insulating substrate;

patterning said electrically conductive film into a gate signal line;

forming a gate insulating film;

forming a second electrically conductive film;

patterning said second electrically conductive film into a source signal line;

etching for removal a portion of said gate insulating film located above a portion of said gate signal line to thereby form a gate terminal contact hole;

forming an oxide-semiconductor film;

patterning said oxide-semiconductor film into a channel, a source and a drain of a thin-film transistor, a pixel electrode, a gate terminal located above said gate terminal contact hole, and a source terminal located at an end of said source signal line;

forming a protection insulating film;

etching for removal portions of said protection insulating film located above said gate terminal, said source terminal, said source, said drain, and said pixel electrode to thereby form a gate/source terminal contact hole and an opening; and

exposing a resultant to one of reducing plasma and plasma containing at least one of B, Al, Ga, In and F.

25. The method as set forth in claim 24, wherein said electrically insulating substrate is comprised of a resin substrate.

35. A liquid crystal display device including a thin-film transistor array fabricated in accordance with a method defined in claim 24.

26. A method of fabricating a thin-film transistor array, comprising, in sequence:

forming an oxide-semiconductor film on an electrically insulating substrate;

patterning said oxide-semiconductor film into a channel, a source and a drain of a thin-film transistor, a pixel electrode, a gate terminal, and a source terminal;

forming a gate insulating film;

etching for removal a portion of said gate insulating film located above a portion of said gate signal line to thereby form a gate terminal contact hole;

forming a first electrically conductive film;

patterning said first electrically conductive film into a gate signal line electrically connected to said gate terminal;

forming an interlayer insulating film;

etching for removal portions of said interlayer insulating film and said gate insulating film located said source terminal and said source to thereby form a source terminal contact hole and a source contact hole;

forming a second electrically conductive film;

patterning said second electrically conductive film into a source signal line electrically connected to said source terminal and said source;

forming a protection insulating film;

etching for removal portions of said gate insulating film, said interlayer insulating film and said gate insulating film located above said gate terminal, said source terminal, said source, said drain and said pixel electrode to thereby form a gate/source terminal contact hole and an opening; and

exposing a resultant to one of reducing plasma and plasma containing at least one of B, Al, Ga, In and F.

27. The method as set forth in claim 26, wherein said electrically insulating substrate is comprised of a resin substrate.

36. A liquid crystal display device including a thin-film transistor array fabricated in accordance with a method defined in claim 26.

28. A method of fabricating a thin-film transistor array, comprising, in sequence:

forming a first electrically conductive film on an electrically insulating substrate;

patterning said first electrically conductive film into a source signal line;

forming an oxide-semiconductor film;

patterning said oxide-semiconductor film into a channel, a source and a drain of a thin-film transistor, a pixel electrode, a gate terminal, and a source terminal;

forming a gate insulating film;

etching for removal a portion of said gate insulating film located above a portion of said gate signal line to thereby form a gate terminal contact hole;

forming a second electrically conductive film;

patterning said second electrically conductive film into a gate signal line electrically connected to said gate terminal;

forming a protection insulating film;

etching for removal portions of said protection insulating film and said gate insulating film located above said gate terminal, said source terminal, said source, said drain and said pixel electrode to thereby form a gate/source terminal contact hole and an opening; and

exposing a resultant to one of reducing plasma and plasma containing at least one of B, Al, Ga, In and F.

29. The method as set forth in claim 28, wherein said electrically insulating substrate is comprised of a resin substrate.

37. A liquid crystal display device including a thin-film transistor array fabricated in accordance with a method defined in claim 28.