METHOD FOR RAPID ESTIMATION OF LAYOUT-DEPENDENT THRESHOLD VOLTAGE VARIATION IN A MOSFET ARRAY

• US 20080301599A1
• Filed: 06/01/2007
• Published: 12/04/2008
• Est. Priority Date: 06/01/2007
• Status: Active Grant

• Current Assignee: Synopsys Incorporated
• Original Assignee: Synopsys Incorporated
• Inventors: Moroz, Victor, Pramanik, Dipankar
• Granted Patent: US 7,584,438 B2
• Time in Patent Office: Days
• US Class Current: 716/5
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
• CPC Class Codes: H01L 21/823412 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 21/823425 manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique

Abstract

An automated method for estimating layout-induced variations in threshold voltage in an integrated circuit layout. The method begins with the steps of selecting a diffusion area within the layout for analysis. Then, the system identifies Si/STI edges on the selected area as well as channel areas and their associated gate/Si edges. Next, the threshold voltage variations in each identified channel area are identified, which requires further steps of calculating threshold voltage variations due to effects in a longitudinal direction; calculating threshold voltage variations due to effects in a transverse direction; and combining the longitudinal and transverse variations to provide an overall variation. Finally, a total variation is determined by combining variations from individual channel variations.

Claims

1. An automated method for estimating layout-induced variations in threshold voltage in an integrated circuit layout, comprising the steps of:

selecting a diffusion area within the layout for analysis;

identifying Si/STI edges on the selected area;

identifying channel areas and their associated gate/Si edges;

determining threshold voltage variations in each identified channel area, including the steps of

calculating threshold voltage variations due to effects in a longitudinal direction;

calculating threshold voltage variations due to effects in a transverse direction;

combining the longitudinal and transverse variations to provide an overall variation; and

determining a total variation by combining variations from individual channel variations.

2. The method of claim 1, wherein calculating threshold voltage variations includes multiplying the maximum threshold voltage variation by a decay function.

3. The method of claim 2, wherein the decay function is

λ

_i(r)=1/((x_i/α

)<sup>β

i</sup>+ε

_i),

where α

_i, β

_i and ε

_i, are process and material-related factors, and r is a distance in either the X or Y direction.

4. The method of claim 2, wherein the decay function is the complementary error function, erfc.

5. The method of claim 2, wherein the decay function is the error function, erf.

6. The method of claim 2, wherein

threshold voltage variations due to effects in a longitudinal direction are calculated according to a decay function,

λ

_i(x)=1/((x_i/α

)<sup>β

i</sup>+ε

_i),

where α

_i, β

_i and ε

_i, are process and material-related factors; and

threshold voltage variations due to effects in a transverse direction are calculated according to the complementary error function, erfc.

7. A system for automated estimation of layout-induced variations in threshold voltage in an integrated circuit layout, comprising:

a digital computer, including a processor, display means and data storage means;

a computer program, stored on the data storage means, configured to perform the steps of

selecting a diffusion area within the layout for analysis;

identifying Si/STI edges on the selected area;

identifying channel areas and their associated gate/Si edges;

determining threshold voltage variations in each identified channel area, including the steps of

calculating threshold voltage variations due to effects in a longitudinal direction;

calculating threshold voltage variations due to effects in a transverse direction;

combining the longitudinal and transverse variations to provide an overall variation; and

determining a total variation by combining variations from individual channel variations.

8. The system of claim 7, wherein calculating threshold voltage variations includes multiplying the maximum threshold voltage variation by a decay function.

9. The system of claim 8, wherein the decay function is

λ

_i(r)=1/((x_i/α

)<sup>β

i</sup>+ε

_i),

where α

_i, β

_i and ε

_i, are process and material-related factors.

10. The system of claim 8, wherein the decay function is the complementary error function, erfc.

11. The system of claim 8, wherein the decay function is the error function, erf.

12. The system of claim 8, wherein

threshold voltage variations due to effects in a longitudinal direction are calculated according to a decay function,

λ

_i(r)=1/((x_i/α

)<sup>β

i</sup>+ε

_i),

where α

_i, β

_i and ε

_i, are process and material-related factors; and

threshold voltage variations due to effects in a transverse direction are calculated according to the complementary error function, erfc.

13. A system for automated estimation of layout-induced variations in threshold voltage in an integrated circuit layout, comprising:

computer program means, stored on the data storage means, for

selecting a diffusion area within the layout for analysis;

identifying Si/STI edges on the selected area;

identifying channel areas and their associated gate/Si edges;

determining threshold voltage variations in each identified channel area, including the steps of

calculating threshold voltage variations due to effects in a longitudinal direction;

calculating threshold voltage variations due to effects in a transverse direction;

combining the longitudinal and transverse variations to provide an overall variation; and

determining a total variation by combining variations from individual channel variations.

14. The system of claim 13, wherein calculating threshold voltage variations includes multiplying the maximum threshold voltage variation by a decay function.

15. The system of claim 14, wherein the decay function is

λ

_i(r)=1/((x_i/α

)<sup>β

i</sup>+ε

_i),

where α

_i, β

_i and ε

_i, are process and material-related factors, and r is a distance in either the X or Y direction.

16. The system of claim 14, wherein the decay function is the complementary error function, erfc.

17. The system of claim 14, wherein the decay function is the error function, erf.

18. The system of claim 14, wherein

threshold voltage variations due to effects in a longitudinal direction are calculated according to a decay function,

λ

_i(x)=1/((x_i/α

)<sup>β

i</sup>+ε

_i),

where α

_i, β

_i and ε

_i, are process and material-related factors; and

threshold voltage variations due to effects in a transverse direction are calculated according to the complementary error function, erfc.