POWER-GATING MEDIA DECODERS TO REDUCE POWER CONSUMPTION
First Claim
Patent Images
1. A system, comprising:
- a decoder circuit configured to receive encoded audio data and to output decoded audio data;
memory electrically coupled to the decoder circuit; and
control logic electrically coupled to the memory and the decoder circuit, the control logic being configured to provide commands to the memory and the decoder circuit that selectively disable at least a portion of the memory based on an amount of decoded audio data in the memory.
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Abstract
Embodiments of a system that reduces power consumption by power-gating media decoders are described. During operation of the system, a decoder circuit receives encoded audio data and outputs corresponding decoded audio data to a memory, which is electrically coupled to the decoder circuit. Moreover, control logic, which is electrically coupled to the memory and the decoder circuit, provides commands to the memory and the decoder circuit that selectively disable at least a portion of the memory based on an amount of decoded audio data in the memory.
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Citations
23 Claims
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1. A system, comprising:
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a decoder circuit configured to receive encoded audio data and to output decoded audio data; memory electrically coupled to the decoder circuit; and control logic electrically coupled to the memory and the decoder circuit, the control logic being configured to provide commands to the memory and the decoder circuit that selectively disable at least a portion of the memory based on an amount of decoded audio data in the memory. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. An integrated circuit, comprising:
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an input interface configured to receive information from a memory and a decoder circuit, the decoder circuit being configured to provide decoded audio data to the memory, and the information indicating an amount of decoded audio data in the memory; a circuit electrically coupled to the input interface, the circuit being configured to provide commands that selectively disable at least a portion of the memory based on the amount of decoded audio data; and an output interface electrically coupled to the circuit, the output interface being configured to output the commands to the memory and the decoder circuit.
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19. An integrated circuit, comprising:
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an input interface configured to receive information from a first memory and a decoder circuit, the decoder circuit being configured to receive encoded audio data from the first memory and the first memory being configured to receive the encoded audio data from a second memory, wherein the information indicates an amount of encoded audio data in the first memory; a circuit electrically coupled to the input interface, the circuit being configured to provide commands that selectively disable at least a portion of the second memory based on the amount of encoded audio data, the decoder circuit being configured to receive the encoded audio data from the first memory even when the portion of the second memory is disabled; and an output interface electrically coupled to the circuit, the output interface being configured to output the commands to the second memory and the decoder circuit.
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20. A portable device, comprising:
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a processor; a first memory; a program, wherein the program is stored in the first memory and configured to be executed by the processor; a decoder circuit configured to receive encoded audio data and to output decoded audio data; a second memory electrically coupled to the decoder circuit; and control logic electrically coupled to the second memory and the decoder circuit, the control logic being configured to provide commands to the second memory and the decoder circuit that selectively disable at least a portion of the second memory based on an amount of decoded audio data in the second memory. - View Dependent Claims (21)
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22. A method for conserving power, comprising:
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receiving information from a memory and a decoder circuit, wherein the decoder circuit is configured to provide decoded audio data to the memory, and the information indicating an amount of decoded audio data in the memory; determining whether to selectively disable at least a portion of the memory based on the amount of decoded audio data in the memory; and providing commands to the memory and the decoder circuit that selectively disable the portion of the memory.
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23. A system configured to execute instructions to conserve power, comprising:
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a processor; a memory; an instruction fetch unit within the processor configured to fetch; instructions for receiving information from a memory and a decoder circuit, the decoder circuit being configured to provide decoded audio data to the memory, and the information indicating an amount of decoded audio data in the memory; instructions for determining whether to selectively disable at least a portion of the memory based on the amount of decoded audio data in the memory; and instructions for providing commands to the memory and the decoder circuit that selectively disable the portion of the memory; and an execution unit within the processor configured to execute the instructions for receiving the information, the instructions for determining whether to selectively disable at least the portion of the memory, and the instructions for providing the commands.
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Specification