External Memory Controller Node
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Accused Products
Abstract
A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein the memory interface receives and provides data for the memory request to the network interface, the network interface configured to send data to and receive data from the programmable network.
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Citations
72 Claims
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1-32. -32. (canceled)
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33. A computing machine embodied in an integrated circuit comprising:
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a memory; a plurality of heterogeneous computational nodes configured to make memory requests for accesses to the memory; and a memory controller including ports that have parameters, the memory controller configured to generate memory locations for the memory requests based on the parameters and to allow accesses by the heterogeneous computational nodes to the memory at the memory locations in response to the memory requests. - View Dependent Claims (34, 35, 36, 37, 38, 39, 40, 41, 42)
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43. A computing machine embodied in an integrated circuit, the computing machine in communication with an external memory device, the integrated circuit comprising:
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a plurality of heterogeneous computational nodes configured to make memory requests for data transfer to the external memory device; and a controller including ports that have parameters, the controller configured to generate memory locations for the data transfer requests based on the parameters and to allow accesses by the heterogeneous computing nodes to the external memory device at the memory locations in response to the data transfer requests. - View Dependent Claims (44, 45, 46, 47, 48, 49, 50, 51, 52)
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53. An adaptive computing machine embodied in an integrated circuit, the adaptive computing machine comprising:
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a memory; a plurality of heterogeneous computational nodes configured to make memory requests for accesses to the memory; a memory controller including ports that have parameters, the memory controller configured to generate memory locations for the memory requests based on the parameters and to allow accesses by the heterogeneous computational nodes to the memory at the memory locations in response to the memory requests; and a programmable interconnection network providing programmable interconnections among the heterogeneous computational nodes and the memory controller. - View Dependent Claims (54, 55, 56, 57, 58, 59, 60, 61, 62)
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63. An adaptive computing machine embodied in an integrated circuit and in communication with an external memory device, the adaptive computing machine comprising:
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a plurality of heterogeneous computational nodes configured to make memory requests for data transfer to the external memory device; a controller including ports that have parameters, the controller configured to generate memory locations for the data transfer requests based on the parameters and to allow accesses by the heterogeneous computing nodes to the external memory device at the memory locations in response to the data transfer requests; and a programmable interconnection network to provide programmable interconnections among the heterogeneous computational nodes and the controller. - View Dependent Claims (64, 65, 66, 67, 68, 69, 70, 71, 72)
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Specification