METHOD OF MAKING WAFER STRUCTURE FOR BACKSIDE ILLUMINATED COLOR IMAGE SENSOR

• US 20090294886A1
• Filed: 08/06/2009
• Published: 12/03/2009
• Est. Priority Date: 05/09/2006
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Hsieh, Chris, Hsu, Tzu-Hsuan, Yu, Chung-Yi, Yaung, Dun-Nian
• Granted Patent: US 8,525,286 B2
• Time in Patent Office: Days
• US Class Current: 257/432
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 27/1461 characterised by the photosensitive area
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14645 Colour imagers
• CPC Class Codes: H01L 27/14685 Process for coatings or optical elements
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: H01L 27/148 Charge coupled imagers individual charge coupled devices H01L29/765
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

An integrated circuit device is provided. The integrated circuit device can include a substrate; a first radiation-sensing element disposed over a first portion of the substrate; and a second radiation-sensing element disposed over a second portion of the substrate. The first portion comprises a first radiation absorption characteristic, and the second portion comprises a second radiation absorption characteristic different from the first radiation absorption characteristic.

Claims

1. A backside illuminated sensor, comprising:

a semiconductor substrate having a front surface, a back surface, and a mid portion;

a plurality of pixels formed on the front surface of the semiconductor substrate; and

wherein the mid portion comprises a plurality of depths, wherein each of the plurality of depths are arranged according to each of the plurality of pixels.

2. The sensor of claim 1, wherein the plurality of pixels is of a type selected from the group consisting of:

a CMOS image sensor, a charge-coupled device, an active-pixel sensor, and a passive-pixel sensor.

3. The sensor of claim 1, wherein the semiconductor substrate is a silicon-on-insulator substrate.

4. The sensor of claim 1, wherein:

the plurality of pixels comprises first, second, and third pixels; and

the plurality of depths comprises a first depth, a second depth, and a third depth, the first, second, and third depths being aligned with the first, second, and third pixels, respectively.

5. The sensor of claim 4, wherein the first depth is between 0.35 μ

m to 8.0 μ

m.

6. The sensor of claim 4, wherein the second depth is between 0.15 μ

m to 3.5 μ

m.

7. The sensor of claim 4, wherein the third depth is between 0.10 μ

m to 2.5 μ

m.

8. The sensor of claim 4, further comprising red, green, and blue color filters aligned with the first, second, and third pixels, respectively.

9. The sensor of claim 8, further comprising a planarization layer located between the mid portion of the semiconductor substrate and the color filters.

10. The sensor of claim 9, wherein the planarization layer is an organic or polymeric material.

11. The sensor of claim 1, further comprising:

a plurality of metal layers over the semiconductor substrate; and

a dielectric layer disposed above the front surface of the semiconductor substrate.

12. An integrated circuit comprising:

a substrate;

a first radiation-sensing element disposed over a first portion of the substrate;

a second radiation-sensing element disposed over a second portion of the substrate; and

wherein the first portion comprises a first radiation absorption characteristic and the second portion comprises a second radiation absorption characteristic different from the first radiation absorption characteristic.

13. The integrated circuit of claim 12, further comprising a planarization layer and color filter disposed over the substrate.

14. The integrated circuit of claim 12, wherein the first and second radiation absorption characteristics are thicknesses between the corresponding radiation-sensing element and a back-side of the substrate.

15. The integrated circuit of claim 14, wherein a first thickness defines a first absorption depth for a first radiation directed towards the first radiation-sensing element and a second thickness defines a second absorption depth for a second radiation directed towards the second radiation-sensing element.

16. An integrated circuit comprising:

a substrate;

a first radiation-sensing element and a second radiation-sensing element disposed over the substrate; and

wherein the substrate comprises a first thickness and a second thickness, wherein the first thickness is aligned with the first radiation-sensing element and the second thickness is aligned with the second radiation-sensing element.

17. The integrated circuit of claim 16, wherein the first thickness comprises a first absorption depth through a first portion of the substrate and the second thickness comprises a second absorption depth through a second portion of the substrate.

18. The integrated circuit of claim 16, further comprising a color filter disposed over a surface of the substrate.

19. The integrated circuit of claim 18, further comprising a planarization layer located between the surface of the substrate and the color filter.

20. The integrated circuit of claim 19, further comprising a lens disposed over the color filter.