METHOD OF MAKING A SEMICONDUCTOR CHIP ASSEMBLY WITH A POST/BASE HEAT SPREADER AND HORIZONTAL SIGNAL ROUTING

• US 20100003787A1
• Filed: 09/13/2009
• Published: 01/07/2010
• Est. Priority Date: 03/25/2008
• Status: Active Grant

• Current Assignee: Bridge Semiconductor Corporation
• Original Assignee: Bridge Semiconductor Corporation
• Inventors: Lin, Charles W.C., Wang, Chia-Chung
• Granted Patent: US 8,062,912 B2
• Time in Patent Office: Days
• US Class Current: 438/118
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32188 the layer connector connecting to a bonding area protruding from the surface of the item
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/85205 Ultrasonic bonding
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01012 Magnesium [Mg]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01087 Francium [Fr]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 33/483 : Containers
• CPC Class Codes: H01L 33/642 : characterized by the shape
• CPC Class Codes: H05K 1/0204 : using means for thermal conduction connection in the thickness direction of the substrate H05K1/0207 takes precedence
• CPC Class Codes: H05K 2201/09054 : Raised area or protrusion of metal substrate
• CPC Class Codes: H05K 2201/10106 : Light emitting diode [LED]
• CPC Class Codes: H05K 2203/0369 : Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
• CPC Class Codes: H05K 3/0061 : onto a metallic substrate, e.g. a heat sink heat sinks for electric apparatus H05K7/20

Abstract

The present invention provides a method of making a semiconductor chip assembly that includes providing a post and a base, mounting an adhesive on the base including inserting the post through an opening in the adhesive, mounting a substrate on the adhesive including inserting the post into an aperture in the substrate to form a gap in the aperture between the post and the substrate, then flowing the adhesive into and upward in the gap, solidifying the adhesive, then mounting a semiconductor device on a heat spreader that includes the post and the base, electrically connecting the semiconductor device to the substrate and thermally connecting the semiconductor device to the heat spreader. The substrate includes first and second conductive layers and a dielectric layer therebetween and provides horizontal signal routing between a pad and a terminal at the first conductive layer.

Claims

1-25. -25. (canceled)

26. A method of making a semiconductor chip assembly, comprising:

providing a post, a base, an adhesive and a substrate, wherein

the substrate includes a first conductive layer, a second conductive layer and a dielectric layer therebetween,

the post is adjacent to the base, extends above the base in an upward direction, extends through an opening in the adhesive and extends into an aperture in the substrate,

the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions,

the adhesive is mounted on and extends above the base, is sandwiched between the base and the substrate and is non-solidified,

the substrate is mounted on and extends above the adhesive, the first conductive layer extends above the dielectric layer, the dielectric layer extends above the second conductive layer, and

a gap is located in the aperture between the post and the substrate;

then

flowing the adhesive into and upward in the gap;

solidifying the adhesive;

then

mounting a semiconductor device on a heat spreader that includes the post and the base, wherein the semiconductor device overlaps the post, the substrate includes a pad, a terminal, a routing line and first and second vias, the pad and the terminal include selected portions of the first conductive layer, the routing line includes a selected portion of the second conductive layer and the vias each extend through the dielectric layer;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal, wherein an electrically conductive path between the pad and the terminal includes the first via, the routing line and the second via; and

thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the base.

27. The method of claim 26, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate; and

then

removing the etch mask, wherein the post is an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, and the base is an unetched portion of the metal plate below the post and the recess.

28. The method of claim 26, wherein:

providing the adhesive includes providing a prepreg with uncured epoxy;

flowing the adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the base and the substrate; and

solidifying the adhesive includes curing the uncured epoxy.

29. The method of claim 26, wherein providing the substrate includes:

forming first and second holes through the first and second conductive layers and the dielectric layer;

depositing the first and second vias into the first and second holes, respectively;

providing the routing line, including removing selected portions of the second conductive layer; and

then

forming the aperture.

30. The method of claim 26, wherein flowing the adhesive includes filling the gap with the adhesive.

31. The method of claim 26, wherein providing the pad and the terminal includes:

grinding the post, the adhesive and the first conductive layer such that the post, the adhesive and the first conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction; and

then

removing selected portions of the first conductive layer.

32. The method of claim 26, wherein mounting the semiconductor device includes providing a first solder joint between the semiconductor device and the pad and a second solder joint between the semiconductor device and the post, electrically connecting the semiconductor device includes providing the first solder joint between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the second solder joint between the semiconductor device and the post.

33. The method of claim 26, wherein mounting the semiconductor device includes providing a die attach between the semiconductor device and the post, electrically connecting the semiconductor device includes providing a wire bond between the semiconductor device and the pad, and thermally connecting the semiconductor device includes providing the die attach between the semiconductor device and the post.

34. The method of claim 26, wherein:

the adhesive contacts the post, the base, the dielectric layer and the routing line, covers the substrate in the downward direction, covers and surrounds the post in the lateral directions and extends to peripheral edges of the assembly after the assembly is manufactured and detached from other assemblies in a batch; and

the base covers the semiconductor device, the post, the substrate and the adhesive in the downward direction and extends to peripheral edges of the assembly after the assembly is manufactured and detached from the other assemblies in the batch.

35. The method of claim 26, including providing a cap on the post that is above and adjacent to and covers in the upward direction and extends laterally in the lateral directions from a top of the post after solidifying the adhesive and before mounting the semiconductor device, wherein the heat spreader includes the cap and the semiconductor device is mounted on the cap.

36. A method of making a semiconductor chip assembly, comprising:

providing a post and a base, wherein the post is adjacent to and integral with the base and extends above the base in an upward direction, and the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions;

providing an adhesive, wherein an opening extends through the adhesive;

providing a substrate that includes first and second conductive layers, first and second vias and a dielectric layer, wherein the dielectric layer is between the conductive layers, a routing line includes a selected portion of the second conductive layer, the vias each extend through the dielectric layer between the first conductive layer and the routing line, and an aperture extends through the substrate;

mounting the adhesive on the base, including inserting the post through the opening, wherein the adhesive extends above the base and the post extends through the opening;

mounting the substrate on the adhesive, including inserting the post into the aperture, wherein the substrate extends above the adhesive, the first conductive layer extends above the dielectric layer, the dielectric layer extends above the second conductive layer, the post extends through the opening into the aperture, the adhesive is sandwiched between the base and the substrate and is non-solidified, and a gap is located in the aperture between the post and the substrate;

then

applying heat to melt the adhesive;

moving the base and the substrate towards one another, thereby moving the post upward in the aperture and applying pressure to the molten adhesive between the base and the substrate, wherein the pressure forces the molten adhesive to flow into and upward in the gap and the post and the molten adhesive extend above the dielectric layer;

applying heat to solidify the molten adhesive, thereby mechanically attaching the post and the base to the substrate;

then

grinding the post, the adhesive and the first conductive layer such that the post, the adhesive and the first conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction;

then

providing a pad and a terminal that include selected portions of the first conductive layer, including removing selected portions of the first conductive layer;

providing a cap on the post that is above and adjacent to and covers in the upward direction and extends laterally in the lateral directions from a top of the post;

then

mounting a semiconductor device on the cap, wherein a heat spreader includes the post, the base and the cap and the semiconductor device overlaps the post;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal, wherein an electrically conductive path between the pad and the terminal includes in sequence the first via, the routing line and the second via; and

thermally connecting the semiconductor device to the cap, thereby thermally connecting the semiconductor device to the base.

37. The method of claim 36, wherein providing the post and the base includes:

providing a metal plate;

forming an etch mask on the metal plate that selectively exposes the metal plate;

etching the metal plate in a pattern defined by the etch mask, thereby forming a recess in the metal plate that extends into but not through the metal plate; and

then

removing the etch mask, wherein the post is an unetched portion of the metal plate that protrudes above the base and is laterally surrounded by the recess, and the base is an unetched portion of the metal plate below the post and the recess.

38. The method of claim 36, wherein:

providing the adhesive includes providing a prepreg with uncured epoxy;

flowing the adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the base and the substrate; and

solidifying the adhesive includes curing the uncured epoxy.

39. The method of claim 36, wherein providing the substrate includes:

forming first and second holes through the first and second conductive layers and the dielectric layer;

depositing the first and second vias into the first and second holes, respectively;

providing the routing line, including removing selected portions of the second conductive layer; and

then

forming the aperture.

40. The method of claim 36, wherein grinding the post, the adhesive and the first conductive layer includes:

grinding the adhesive without grinding the post; and

then

grinding the post, the adhesive and the first conductive layer.

41. The method of claim 36, wherein providing the pad and the terminal includes:

depositing a third conductive layer on the post, the adhesive and the first conductive layer after the grinding; and

then

removing selected portions of the first and third conductive layers.

42. The method of claim 36, wherein providing the cap includes:

depositing a third conductive layer on the post, the adhesive and the first conductive layer after the grinding; and

then

removing selected portions of the third conductive layer.

43. The method of claim 36, wherein providing the pad, the terminal and the cap includes:

depositing a third conductive layer on the post, the adhesive and the first conductive layer after the grinding;

forming an etch mask on the third conductive layer that selectively exposes the third conductive layer;

etching the first and third conductive layers using the etch mask to define the pad and the terminal;

etching the third conductive layer using the etch mask to define the cap; and

then

removing the etch mask.

44. The method of claim 36, wherein mounting the semiconductor device includes mounting an LED package that includes an LED chip over the pad using a first solder joint and the cap using a second solder joint, electrically connecting the semiconductor device includes providing the first solder joint between the LED package and the pad, and thermally connecting the semiconductor device includes providing the second solder joint between the LED package and the cap.

45. The method of claim 36, wherein mounting the semiconductor device includes providing a die attach between a semiconductor chip and the cap, electrically connecting the semiconductor device includes providing a wire bond between the chip and the pad, and thermally connecting the semiconductor device includes providing the die attach between the chip and the cap.

46. A method of making a semiconductor chip assembly, comprising:

providing a post and a base, wherein the post is adjacent to and integral with the base and extends above the base in an upward direction, and the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in a lateral plane orthogonal to the upward and downward directions;

providing an adhesive, wherein an opening extends through the adhesive;

providing a substrate that includes first and second conductive layers, first and second vias and a dielectric layer, wherein the dielectric layer is between the conductive layers, a routing line includes a selected portion of the second conductive layer, the vias each extend through the dielectric layer between the first conductive layer and the routing line, and an aperture extends through the substrate;

mounting the adhesive on the base, including inserting the post through the opening, wherein the adhesive extends above the base and the post extends through the opening;

mounting the substrate on the adhesive, including inserting the post into the aperture, wherein the substrate extends above the adhesive, the first conductive layer extends above the dielectric layer, the dielectric layer extends above the second conductive layer, the post extends through the opening into the aperture, the adhesive is sandwiched between the base and the substrate and is non-solidified, and a gap is located in the aperture between the post and the substrate;

then

applying heat to melt the adhesive;

moving the base and the substrate towards one another, thereby moving the post upward in the aperture and applying pressure to the molten adhesive between the base and the substrate, wherein the pressure forces the molten adhesive to flow into and upward in the gap and the post and the molten adhesive extend above the dielectric layer;

applying heat to solidify the molten adhesive, thereby mechanically attaching the post and the base to the substrate;

then

grinding the adhesive without grinding the post;

then

grinding the post, the adhesive and the first conductive layer such that the post, the adhesive and the first conductive layer are laterally aligned with one another at a top lateral surface that faces in the upward direction;

then

depositing a third conductive layer on the post, the adhesive and the first conductive layer;

then

providing a pad and a terminal that include selected portions of the first and third conductive layers, including removing selected portions of the first and third conductive layers;

providing a cap on the post that includes a selected portion of the third conductive layer, including removing selected portions of the third conductive layer, wherein the cap is above and adjacent to and covers in the upward direction and extends laterally in the lateral directions from a top of the post;

then

mounting a semiconductor device on the cap, wherein a heat spreader includes the post, the base and the cap and the semiconductor device overlaps the post;

electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal, wherein an electrically conductive path between the pad and the terminal includes in sequence the first via, the routing line and the second via; and

thermally connecting the semiconductor device to the cap, thereby thermally connecting the semiconductor device to the base.

47. The method of claim 46, wherein:

providing the adhesive includes providing a prepreg with uncured epoxy;

flowing the adhesive includes melting the uncured epoxy and compressing the uncured epoxy between the base and the substrate; and

solidifying the adhesive includes curing the uncured epoxy.

48. The method of claim 46, wherein providing the pad, the terminal and the cap includes:

forming an etch mask on the third conductive layer that selectively exposes the third conductive layer;

etching the first and third conductive layers using the etch mask to define the pad and the terminal;

etching the third conductive layer using the etch mask to define the cap; and

then

removing the etch mask.

49. The method of claim 46, wherein mounting the semiconductor device includes mounting an LED package that includes an LED chip over the pad using a first solder joint and the cap using a second solder joint, electrically connecting the semiconductor device includes providing the first solder joint between the LED package and the pad, and thermally connecting the semiconductor device includes providing the second solder joint between the LED package and the cap.

50. The method of claim 46, wherein:

the adhesive contacts the post, the base, the cap, the dielectric layer and the routing line, covers the substrate in the downward direction, covers and surrounds the post in the lateral directions and extends to peripheral edges of the assembly after the assembly is manufactured and detached from other assemblies in a batch; and

the base covers the semiconductor device, the post, the cap the substrate and the adhesive in the downward direction and extends to peripheral edges of the assembly after the assembly is manufactured and detached from the other assemblies in the batch.