HYBRID HETEROJUNCTION SOLAR CELL FABRICATION USING A DOPING LAYER MASK

• US 20100015756A1
• Filed: 07/16/2009
• Published: 01/21/2010
• Est. Priority Date: 07/16/2008
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Fang, Hongbin, Mishra, Rohit, Weidman, Timothy W., Stewart, Michael P., Cha, Yonghwa Chris, Wijekoon, Kapila P.
• Granted Patent: US 8,309,446 B2
• Time in Patent Office: Days
• US Class Current: 438/96
• CPC Class Codes: H01L 21/67155 Apparatus for manufacturing or treating in a plurality of work-stations
• CPC Class Codes: H01L 31/022425 for solar cells
• CPC Class Codes: H01L 31/0236 Special surface textures
• CPC Class Codes: H01L 31/1876 Particular processes or apparatus for batch treatment of the devices
• CPC Class Codes: Y02E 10/50 Photovoltaic [PV] energy
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

Embodiments of the invention contemplate the formation of a high efficiency solar cell using a novel processing sequence to form a solar cell device. In one embodiment, the methods include forming a doping layer on a back surface of a substrate, heating the doping layer and substrate to cause the doping layer diffuse into the back surface of the substrate, texturing a front surface of the substrate after heating the doping layer and the substrate, forming a dielectric layer on the back surface of the substrate, removing portions of the dielectric layer from the back surface to from a plurality of exposed regions of the substrate, and depositing a metal layer over the back surface of the substrate, wherein the metal layer is in electrical communication with at least one of the plurality of exposed regions on the substrate, and at least one of the exposed regions has dopant atoms provided from the doping layer.

Claims

1. A method of forming a solar cell device, comprising:

forming a first doping layer on a back surface of a crystalline silicon substrate; and

texturing a front surface of the crystalline silicon substrate, wherein the first doping layer disposed on the back surface is configured to prevent substantial etching of the back surface during the process of texturing the front surface.

2. The method of claim 1, wherein the first doping layer comprises dopant atoms, and the crystalline silicon substrate comprises silicon having dopant atoms disposed therein, wherein the dopant atoms in the first doping layer and the crystalline silicon substrate are the same conductivity type.

3. The method of claim 2, wherein the first doping layer comprises a silicate glass material.

4. The method of claim 1, further comprising:

heating the first doping layer and the crystalline silicon substrate to cause the first doping layer to diffuse into the back surface of the crystalline silicon substrate;

forming a dielectric layer over at least a portion of the back surface after forming the first doping layer on the back surface;

removing portions of the dielectric layer from the back surface to form a plurality of exposed regions of the crystalline silicon substrate; and

depositing a metal layer over the back surface of the crystalline silicon substrate, wherein the metal layer is in electrical communication with at least one of the plurality of exposed regions on the crystalline silicon substrate.

5. The method of claim 4, wherein the metal layer comprises a metal or a metal alloy that is selected from a group consisting of copper (Cu), silver (Ag), gold (Au), tin (Sn), cobalt (Co), rhenium (Rh), nickel (Ni), zinc (Zn), lead (Pb), palladium (Pd), tungsten (W), titanium (Ti), tantalum (Ta), molybdenum (Mo), aluminum (Al), titanium nitride (TiN), titanium tungsten (TiW), tantalum nitride (TaN), and nickel vanadium (NiV).

6. The method of claim 4, wherein removing portions of the dielectric layer from the back surface comprises selectively depositing an etchant material that comprises a dopant atom on the dielectric layer.

7. The method of claim 6, further comprising heating the dielectric layer and etchant material to a temperature that will allow the etching material to etch the dielectric layer and also allow the dopant atom in the etching material to diffuse into the exposed regions of the crystalline silicon substrate.

8. The method of claim 1, wherein texturing the front surface of the crystalline silicon substrate comprises immersing the crystalline silicon substrate in a texture etch solution, wherein the texture etch solution comprises an etchant selected from a list consisting of ammonium fluoride, hydrogen fluoride, potassium hydroxide, and hydrofluoric acid.

9. The method of claim 8, wherein the texture etch solution further comprises polyethylene glycol, glycerine, and triethanolamine.

10. The method of claim 1, further comprising:

selectively forming a second doping layer on a desired region of the front surface of the crystalline silicon substrate; and

heating the first doping layer and second doping layer to cause the first doping layer and second doping layer diffuse into the back surface and the front surface of the crystalline silicon substrate simultaneously.

11. The method of claim 10, wherein the second doping layer comprises materials selected from a group consisting of phosphorus (P), arsenic (As), antimony (Sb), polyphosphoric acid, phosphosilicate glass precursors, phosphoric acid (H₃PO₄), phosphorus acid (H₃PO₃), hypophosphorous acid (H₃PO₂), and ammonium salts thereof.

12. A method of forming a solar cell device, comprising:

forming an amorphous silicon layer on a back surface of a crystalline silicon substrate; and

texturing a front surface of the crystalline silicon substrate, wherein the amorphous silicon layer disposed on the back surface is configured to prevent substantial etching of the back surface during the process of texturing the front surface.

13. The method of claim 12, wherein the crystalline silicon substrate comprises a p-type dopant atom and the silicon layer comprises silicon and boron.

14. The method of claim 12, wherein the amorphous silicon layer further comprises a capping layer formed over a surface of the amorphous silicon layer.

15. The method of claim 14, wherein the capping layer is a layer that is selected from a group consisting of a silicon oxide, a silicon nitride, and a silicon oxynitride containing material.

16. The method of claim 12, further comprising:

removing at least a portion of the amorphous silicon layer from the back surface of the crystalline silicon substrate to form an exposed region;

heating the amorphous silicon layer and the crystalline silicon substrate to cause doping atoms disposed in the amorphous silicon layer to diffuse into the crystalline silicon substrate; and

depositing a metal layer over the back surface of the crystalline silicon substrate, wherein the metal layer is in electrical communication with the exposed region.

17. The method of claim 16, further comprising forming a dielectric layer on the back surface of the crystalline silicon substrate after forming the doping layer and before depositing a metal layer over the back surface of the crystalline silicon substrate.

18. The method of claim 12, further comprising:

forming a doping layer on the front surface of the crystalline silicon substrate; and

heating the amorphous silicon layer and the doping layer to cause dopant atoms in the amorphous silicon layer to diffuse into the back surface and dopant atoms in the doping layer to diffuse into the front surface of the crystalline silicon substrate.

19. A method of forming a solar cell device, comprising:

forming a doping layer comprising a silicon layer comprising a first type of doping atom on a back surface of a silicon substrate;

forming a dielectric layer over the doping layer on the back surface of the silicon substrate;

heating the silicon substrate to cause the first type of doping atom diffuse into the silicon substrate;

removing portions of the dielectric layer from the back surface to from a plurality of exposed regions of the silicon substrate; and

depositing a metal layer over the back surface of the silicon substrate, wherein the metal layer is in electrical communication with at least one of the exposed regions of the silicon substrate.

20. The method of claim 19, further comprising texturing a front surface of the silicon substrate after forming the dielectric layer over the doping layer, wherein texturing the front surface of the substrate comprises immersing the substrate in a texture etch solution, and wherein the texture etch solution comprises an etchant selected from a list consisting of ammonium fluoride, hydrogen fluoride, potassium hydroxide, and hydrofluoric acid.

21. The method of claim 19, wherein the silicon substrate comprises a p-type substrate and the first type of doping atom is boron.

22. The method of claim 19, wherein the silicon layer comprises a material that is selected from a group consisting of a doped amorphous silicon layer or a doped amorphous silicon carbide layer.

23. The method of claim 19, wherein the doping layer further comprises a capping layer formed over the silicon layer.

24. The method of claim 20, wherein removing portions of the dielectric layer from the back surface comprises selectively depositing a deposited etchant material that comprises a dopant atom on the dielectric layer.

25. A system that is adapted to form a solar cell, comprising:

a first processing module that is adapted to deposit a doping layer on a first surface of a silicon substrate;

a second processing module that is adapted to heat the amorphous silicon doping layer and the silicon substrate;

a third processing module that is configured to retain a texture etch solution that is used to form a texture a second surface of the silicon substrate that is opposite the first surface, wherein the third processing module is downstream of the first processing module;

a fourth processing module that is adapted to deposit a dielectric layer on the first surface of the silicon substrate;

a fifth processing module that is adapted to deposit an etchant material over the dielectric layer;

a sixth processing module that is adapted to deposit a metal layer on the dielectric layer; and

a plurality of automation devices that is adapted to deliver the silicon substrate to the first, second, third, fourth, fifth and sixth processing modules.