POWER CONVERTER DISABLE VERIFICATION SYSTEM AND METHOD
First Claim
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1. A motor control system, comprising:
- an inverter module comprising a solid state switch configured to generate an output power waveform for powering the motor;
driver circuitry communicatively coupled to the inverter module and configured to activate and deactivate the solid state switch for generating the output power waveform; and
shutdown circuitry coupled to the driver circuitry and configured to disable the driver circuitry;
wherein the shutdown circuitry is configured to perform a shutdown diagnostic test that verifies the ability of the shutdown circuitry to disable the driver circuitry by disabling the driver circuitry for a time period that is short enough to prevent the solid state switch from changing state.
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Abstract
A power electronics device with an improved IGBT protection mechanism is provided. More specifically, systems and methods are provided for shortening the duration of a shutdown test pulse, such that the power output to the load is substantially unaffected.
16 Citations
22 Claims
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1. A motor control system, comprising:
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an inverter module comprising a solid state switch configured to generate an output power waveform for powering the motor; driver circuitry communicatively coupled to the inverter module and configured to activate and deactivate the solid state switch for generating the output power waveform; and shutdown circuitry coupled to the driver circuitry and configured to disable the driver circuitry; wherein the shutdown circuitry is configured to perform a shutdown diagnostic test that verifies the ability of the shutdown circuitry to disable the driver circuitry by disabling the driver circuitry for a time period that is short enough to prevent the solid state switch from changing state. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of operating a motor drive, comprising:
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sending drive pulses from a driver circuitry to an inverter input device; sending output pulses corresponding to the drive pulses from the inverter input device to a solid state switch to generate an output power waveform; and performing a test configured to temporarily disable the driver circuitry; wherein the inverter input device causes a time delay between a termination of the drive pulses and a termination of the output pulses, and wherein duration of the test is shorter than the time delay. - View Dependent Claims (14, 15, 16, 17)
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18. A method of performing a shutdown diagnostic test in a motor drive, comprising:
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sending a pulse-test-enable command from a processor to a reset input of a latch, the pulse-test-enable signal enabling the latch to change state in response to a clock input of the latch; sending a shutdown command from the processor to a disable circuitry; sending a disable command from the disable circuitry to a driver circuitry in response to the shutdown command; sending a status indicator from the driver circuitry to the clock input of the latch in response to the disable command, the status indicator causing the latch to change state; and sending a power-up command from the latch to the disable circuitry, the power-up command over-riding the shutdown command from the processor. - View Dependent Claims (19, 20, 21)
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22. A method of performing a diagnostic test in a motor drive, comprising:
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sending a disable signal to a driver circuitry, the disable signal causing the driver circuitry to stop sending drive signals to an inverter module; receiving a status signal from the driver circuitry, the status signal indicating that the driver circuitry has been disabled; and sending a re-enable signal to the driver circuitry that causes the driver circuitry to resume sending drive signals to the inverter module; wherein the re-enable signal is sent to the driver circuitry before the inverter module disrupts the sending of power to the motor in response to the disable signal.
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Specification