SYSTEM AND METHOD FOR COMMON HISTORY PESSIMISM RELIEF DURING STATIC TIMING ANALYSIS
First Claim
10. A program product stored on a computer readable medium, which when executed, adjusts modeled timing data variation as a function of past state and/or switching history during static timing analysis, the program product comprising:
- program code for at least one of inputting and asserting at least one of initial signal history bound and explicit device history bound constraints for at least one signal of a circuit design;
program code for evaluating for a segment processed during a forward propagation of block based static timing analysis whether any input signal to a current segment has a bounded history, at least one of propagated and asserted;
program code for evaluating for the segment whether history bounds are downstream from a gating restriction; and
program code for processing a next segment until there are no further segments.
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Accused Products
Abstract
A system and method for adjustment of modeled timing data variation as a function of past state and/or switching history during static timing analysis. One illustrative embodiment may include inputting and asserting at least one of initial signal history bound and explicit device history bound constraints for at least one signal of a circuit design and evaluating for a segment processed during a forward propagation of block based static timing analysis whether any input signal to a current segment has a bounded history, at least one of propagated and asserted. The method may further include evaluating for the segment whether history bounds are downstream from a gating restriction, and processing a next segment until there are no further segments.
30 Citations
21 Claims
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10. A program product stored on a computer readable medium, which when executed, adjusts modeled timing data variation as a function of past state and/or switching history during static timing analysis, the program product comprising:
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program code for at least one of inputting and asserting at least one of initial signal history bound and explicit device history bound constraints for at least one signal of a circuit design; program code for evaluating for a segment processed during a forward propagation of block based static timing analysis whether any input signal to a current segment has a bounded history, at least one of propagated and asserted; program code for evaluating for the segment whether history bounds are downstream from a gating restriction; and
program code for processing a next segment until there are no further segments. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19-1. The system of claim 20, wherein the static timing engine is further structured to proceed directly to the processing of the next segment in response to the current segment not having a bounded history.
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20-2. The system of claim 20, wherein the static timing engine is further structured to propagate the history bounds without a gating restriction in response to the history bounds are not downstream from the gating restriction.
Specification