PARASITIC CAPACITANCE CANCELLATION IN CAPACITIVE MEASUREMENT APPLICATIONS
3 Assignments
0 Petitions
Accused Products
Abstract
An integrated circuit for compensating for parasitic capacitance in a capacitive measuring apparatus wherein a capacitance measurement is done by repeatedly transferring charge from a capacitor to be measured to a reference capacitor.
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Citations
40 Claims
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1-19. -19. (canceled)
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20. An integrated circuit comprising a capacitive measurement circuit for use in a capacitive measurement circuit that is connected to a sense plate structure, wherein the integrated circuit implements at least one of the following techniques:
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(a) the use of a current ratio, derived through at least one current mirror structure, to scale a charge transferred from the sense plate structure to the capacitive measurement circuit in order to achieve practical on-chip implementation; and (b) the subtraction of an adjustable amount of charge through the use of selectable practical on-chip structures, from a charge in the capacitive measurement circuit that reflects the charge transferred from the sense plate structure to the capacitive measurement circuit, in order to effectively reduce the measured capacitance of the sense plate structure. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37)
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38. A method of adjusting the number of charge transfer cycles in a capacitive measurement cycle of a capacitive measurement circuit which includes a sense plate structure, an integrated on-chip reference capacitor wherein a charge, reflecting the size of the capacitance of the sense plate structure, is accumulated and current mirror ratios structures, the method including the step of optimizing the capacitive measurement circuit performance in terms of a selected parameter, by dynamically adjusting at least one of the following parameters in accordance with an algorithm:
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(a) a current mirror ratio; (b) the size of the on-chip reference capacitor; and (c) an amount of charge to be removed from the capacitive measurement circuit during each cycle of the charge transfer measurement, using selectable on-chip structures, in order to reduce the measured capacitance of the sense plate structure. - View Dependent Claims (39, 40)
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Specification