DEFECTIVE MEMORY BLOCK REMAPPING METHOD AND SYSTEM, AND MEMORY DEVICE AND PROCESSOR-BASED SYSTEM USING SAME
7 Assignments
0 Petitions
Accused Products
Abstract
A non-volatile memory device includes a block remapping system that offsets an input block address by the addresses of non-functional blocks to provide an output block address that is used to address the memory device. The system generates the output block addresses by, in effect, adding to the input block address the addresses of all non-functional blocks of memory that are between an initial address and the output block address. The system performs this function be comparing the input block address to the address of any defective block. If the address of the defective block is less than or equal to the input block address, the addresses of all defective blocks starting at the block address are added to the input block address. The system then iteratively performs this process using each output block address generated by the system in place of the input block address.
-
Citations
21 Claims
-
1. (canceled)
-
2. A method of addressing a memory, comprising:
-
storing addresses and respective sizes of non-functional memory blocks of the memory; receiving an input address for access to the memory; determining a number of bad addresses between an initial address of the memory and the input address; incrementing the input address by the number of bad addresses to yield an output address; and accessing the memory using the output address. - View Dependent Claims (3, 4, 5, 6, 7)
-
-
8. A method of replacing bad memory blocks of a memory, comprising:
-
mapping addresses for bad memory blocks in an array to a next available good memory block in the array; and storing addresses and respective sizes of the bad memory block in the array, the stored addresses and respective sizes of bad memory used in calculating remapped block addresses for good memory blocks in the array when accessing input addresses for access to the array. - View Dependent Claims (9, 10, 11, 12)
-
-
13. A memory, comprising:
-
an array of memory blocks; programmable memory configured to be programmed with addresses of bad memory blocks of the array and further configured to be programmed with respective sizes of bad memory; a remapping circuit coupled to the programmable memory and configured to determine a number of bad memory blocks between a memory block to which an input address is mapped and an initial block of memory and further configured to calculate a mapped address for the input address to access the memory block to which the input address is mapped based at least in part on the programmed address and respective sizes. - View Dependent Claims (14, 15, 16, 17, 18)
-
-
19. A memory, comprising:
-
redundancy fuse sets configured to be programmed with block addresses for non-functional memory blocks and a respective block size; a comparator coupled to the redundancy fuse sets and configured to compare an input block address with the addresses programmed in the redundancy fuse sets; an adder configured to add to the input block address the block sizes for non-functional memory blocks having addresses not greater than the input block address to provide a mapped block address; and an address decoder coupled to the adder and configured to access a memory block corresponding to the mapped block address. - View Dependent Claims (20, 21)
-
Specification