MEMORY DEVICE AND SIGNAL PROCESSING CIRCUIT
First Claim
1. A semiconductor device comprising:
- a memory circuit comprising a first transistor and a capacitor;
a logic circuit comprising a second transistor, a third transistor, a fourth transistor, and a fifth transistor; and
a control circuit comprising a sixth transistor,wherein a first terminal of the first transistor is electrically connected to one electrode of the capacitor,wherein a second terminal of the first transistor is electrically connected to a first terminal of the second transistor, a first terminal of the third transistor, a gate of the fourth transistor, a gate of the fifth transistor, and a gate of the sixth transistor,wherein a second terminal of the second transistor is electrically connected to a first terminal of the fourth transistor and a first terminal of the sixth transistor,wherein a second terminal of the third transistor is electrically connected to a first terminal of the fifth transistor, andwherein a gate of the second transistor and a gate of the third transistor are electrically connected to a second terminal of the fourth transistor and a second terminal of the fifth transistor.
1 Assignment
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Accused Products
Abstract
A memory device which can keep a stored logic state even when the power is off is provided. A signal processing circuit including the memory device, which achieves low power consumption by stopping supply of power, is provided. The memory device includes a logic circuit including a first node, a second node, a third node, and a fourth node; a first control circuit connected to the first node, the second node, and the third node; a second control circuit connected to the first node, the second node, and the fourth node; a first memory circuit connected to the first node, the first control circuit, and the second control circuit; and a second memory circuit connected to the second node, the first control circuit, and the second control circuit.
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Citations
12 Claims
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1. A semiconductor device comprising:
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a memory circuit comprising a first transistor and a capacitor; a logic circuit comprising a second transistor, a third transistor, a fourth transistor, and a fifth transistor; and a control circuit comprising a sixth transistor, wherein a first terminal of the first transistor is electrically connected to one electrode of the capacitor, wherein a second terminal of the first transistor is electrically connected to a first terminal of the second transistor, a first terminal of the third transistor, a gate of the fourth transistor, a gate of the fifth transistor, and a gate of the sixth transistor, wherein a second terminal of the second transistor is electrically connected to a first terminal of the fourth transistor and a first terminal of the sixth transistor, wherein a second terminal of the third transistor is electrically connected to a first terminal of the fifth transistor, and wherein a gate of the second transistor and a gate of the third transistor are electrically connected to a second terminal of the fourth transistor and a second terminal of the fifth transistor. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A semiconductor device comprising:
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a switch configured to output a data signal to a logic circuit in response to a control signal; the logic circuit configured to hold the data signal in a period during which a first power supply voltage is supplied; a control circuit configured to output a second power supply potential to the logic circuit in accordance with the data signal; and a nonvolatile memory circuit configured to hold the data signal in response to a second control signal, wherein the nonvolatile memory circuit is configured to hold the data signal during the supply of the first power supply voltage is stopped. - View Dependent Claims (8, 9, 10, 11, 12)
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Specification