METHOD OF SORTING A MULTI-BIT PER CELL NON-VOLATILE MEMORY AND A MULTI-MODE CONFIGURATION METHOD
First Claim
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1. A method of sorting a multi-bit per cell non-volatile memory, comprising:
- programming and reading to test an n-bit-per-cell (n-bpc) non-volatile memory, which has a plurality of m-bpc pages, where m is a positive integer from 1 through n;
if the m-bpc page fails the test, counting a block associated with the failed m-bpc page to (m−
1)-bpc blocks;
wherein each said m-bpc page is subjected to at most one time of programming and reading.
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Abstract
A method of sorting a multi-bit per cell non-volatile memory includes programming and reading to test an n-bit-per-cell (n-bpc) non-volatile memory, which has a plurality of m-bpc pages, where m is a positive integer from 1 through n. If the m-bpc page fails the test, counting a block associated with the failed m-bpc page to (m-1)-bpc blocks, wherein each said m-bpc page is subjected to at most one time of programming and reading. When m is equal to 1, the 0-bpc block corresponds to a bad block.
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Citations
10 Claims
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1. A method of sorting a multi-bit per cell non-volatile memory, comprising:
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programming and reading to test an n-bit-per-cell (n-bpc) non-volatile memory, which has a plurality of m-bpc pages, where m is a positive integer from 1 through n; if the m-bpc page fails the test, counting a block associated with the failed m-bpc page to (m−
1)-bpc blocks;wherein each said m-bpc page is subjected to at most one time of programming and reading. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A multimode configuration method for a multi-bit per cell non-volatile memory, comprising:
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sorting at least one n-bit-per-cell (n-bpc) non-volatile memory to obtain capacity information; and configuring said at least one non-volatile memory according to the capacity information such that blocks of said at least one non-volatile memory are operated in distinct modes with different number of bits per cell. - View Dependent Claims (8, 9, 10)
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Specification