System and Method for Testing an Integrated Circuit
First Claim
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1. A method of testing an integrated circuit, the method comprising:
- receiving a supply voltage on the integrated circuit via a first input pin;
providing power to circuits disposed on the integrated circuit via the first input pin;
comparing the supply voltage to an internally generated voltage;
generating a digital output value based on the comparing; and
applying the digital output value to a pin of the integrated circuit.
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Abstract
In accordance with an embodiment, a method of testing an integrated circuit, includes receiving a supply voltage on the integrated circuit via a first input pin, providing power to circuits disposed on the integrated circuit via the first input pin, comparing the supply voltage to an internally generated voltage, generating a digital output value based on the comparing, and applying the digital output value to a pin of the integrated circuit.
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Citations
36 Claims
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1. A method of testing an integrated circuit, the method comprising:
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receiving a supply voltage on the integrated circuit via a first input pin; providing power to circuits disposed on the integrated circuit via the first input pin; comparing the supply voltage to an internally generated voltage; generating a digital output value based on the comparing; and applying the digital output value to a pin of the integrated circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of testing a MOS switch, the method comprising:
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pumping a substrate of the MOS switch to a negative voltage; comparing an output node of a MOS switch to a reference voltage; and determining a failed test condition when the output node of the MOS switch is less than the reference voltage. - View Dependent Claims (14)
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15. An integrated circuit comprising:
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a first circuit; a digital interface; and a data converter having a first input coupled to a supply voltage, a second input coupled to the first circuit, and an output coupled to the digital interface, wherein the digital interface is readable in a test mode. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. An integrated circuit comprising:
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a semiconductor switch; a digital interface; and a comparator having a first input coupled to a reference voltage, a second input coupled to a substrate connection of the semiconductor switch, and an output coupled to the digital interface. - View Dependent Claims (26, 27, 28)
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29. An integrated switch system comprising:
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a voltage regulator; a digital interface; a power supply input; a charge pump; an RF switch; and a measurement interface circuit comprising a comparator having a first input coupled to the power supply input, a second input coupled to a parameter measurement node, and an output coupled to the digital interface. - View Dependent Claims (30, 31, 32, 33, 34, 35, 36)
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Specification