METHOD AND DEVICE FOR SAMPLING AN INPUT SIGNAL

• US 20130321053A1
• Filed: 05/30/2012
• Published: 12/05/2013
• Est. Priority Date: 05/30/2012
• Status: Active Grant

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Inventors: Bogner, Peter, Faricelli, Marco
• Granted Patent: US 9,000,809 B2
• Time in Patent Office: Days
• US Class Current: 327/261
• CPC Class Codes: G11C 27/02 Sample-and-hold arrangements G11C27/04 takes precedence
• CPC Class Codes: G11C 27/024 using a capacitive memory element G11C27/04 takes precedence
• CPC Class Codes: H03M 1/128 at random intervals, e.g. digital alias free signal processing [DASP]

Abstract

In accordance with various embodiments, a method for sampling an input signal may be provided, wherein the method may include providing a single frequency clock signal; selecting clock pulses from the single frequency clock signal in a random manner to generate a spread spectrum clock signal; and sampling the input signal using the spread spectrum clock signal. A corresponding device for sampling an input signal may be provided.

Claims

1. A method for sampling an input signal, the method comprising:

providing a single frequency clock signal;

selecting clock pulses from the single frequency clock signal in a random manner to generate a spread spectrum clock signal;

sampling the input signal using the spread spectrum clock signal.

2. The method of claim 1,

wherein the single frequency clock signal is a digital signal.

3. The method of claim 1, further comprising:

delaying at least one of the selected clock pulses by a delay time.

4. The method of claim 3,

wherein delaying the at least one of the selected clock pulses comprises passing the at least one of the selected clock pulses through at least one delay element.

5. The method of claim 1,

wherein the input signal is a DC signal.

6. The method of claim 1,

wherein the input signal is an AC signal.

7. A device for sampling an input signal, the device comprising:

a selector configured to select clock pulses from a single frequency clock signal in a random manner;

a generator configured to generate a spread spectrum clock signal from the selected clock pulses;

a sampling circuit configured to sample the input signal using the spread spectrum clock signal.

8. The device of claim 7, further comprising:

a clock signal generator configured to provide the single frequency clock signal.

9. The device of claim 8,

wherein the single frequency clock signal is a digital signal.

10. The device of claim 9, further comprising:

a delay circuit configured to delay at least one of the clock pulses selected by the selector by a delay time.

11. The device of claim 10,

wherein the delay circuit comprises at least one inverter.

12. The device of claim 10,

wherein the delay circuit comprises a ring oscillator.

13. The device of claim 7,

wherein the input signal is a DC signal.

14. The device of claim 7,

wherein the input signal is an AC signal.