SYSTEM AND METHOD TO ARBITRATE ACCESS TO MEMORY
First Claim
1. A system comprising:
- a central processing unit (CPU);
a peripheral device;
a memory controller configured to control a main memory, wherein the CPU and peripheral devices operatively connect to said memory controller;
wherein access to and from the main memory by the CPU and access to and from the main memory by the peripheral device is prioritized respectively according to a CPU priority level and a peripheral device priority level;
an arbitration module operatively attached to the CPU, the peripheral device and the memory controller, wherein the arbitration module is configured to receive the peripheral device priority level and when the CPU priority level and the peripheral device priority level are both set at the highest available priority level, the arbitration module is configured to output to the memory controller a new CPU priority level less than the highest available priority level.
2 Assignments
0 Petitions
Accused Products
Abstract
Arbitrating memory access between a central processing unit CPU and a peripheral device to main memory. The memory access to and from the main memory by the CPU and memory access to and from the main memory by the peripheral device is prioritized respectively according to a CPU priority level and a peripheral device priority level. An arbitration module is provided externally to the CPU, to the peripheral device and to the memory controller. The arbitration module receives the peripheral device priority level. When the CPU priority level and the peripheral device priority level are both set at the highest available priority level, the arbitration module outputs to the memory controller a new CPU priority level less than the highest available priority level.
-
Citations
15 Claims
-
1. A system comprising:
-
a central processing unit (CPU); a peripheral device; a memory controller configured to control a main memory, wherein the CPU and peripheral devices operatively connect to said memory controller; wherein access to and from the main memory by the CPU and access to and from the main memory by the peripheral device is prioritized respectively according to a CPU priority level and a peripheral device priority level; an arbitration module operatively attached to the CPU, the peripheral device and the memory controller, wherein the arbitration module is configured to receive the peripheral device priority level and when the CPU priority level and the peripheral device priority level are both set at the highest available priority level, the arbitration module is configured to output to the memory controller a new CPU priority level less than the highest available priority level. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
-
-
13. A method for arbitrating memory access between a central processing unit CPU and a peripheral device to main memory, wherein the memory access to and from the main memory by the CPU and to and from the main memory by the peripheral device is prioritized according to a CPU priority level and a peripheral device priority level, the method comprising:
-
providing an arbitration module external to the CPU, the peripheral device and the memory controller; receiving by the arbitration module the peripheral device priority level from the peripheral device; and when the CPU priority level and the peripheral device priority level are both set at the highest available priority level outputting by the arbitration module to the memory controller, a new CPU priority level less than the highest available priority level. - View Dependent Claims (14, 15)
-
Specification