BAND GAP REFERENCE CIRCUIT
First Claim
1. A band gap reference circuit, comprising:
- a voltage reference circuit configured to generate an intermediate reference voltage; and
a self correction circuit configured to prevent overshoot for an output reference voltage, stabilize the output reference voltage based on the intermediate reference voltage, and output the output reference voltage as a high reliability reference voltage (Vref).
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Accused Products
Abstract
A band gap reference circuit is provided that includes a first resistor (R1), a second resistor (R2), a third resistor (R3), a fourth resistor (Ra), a fifth resistor (Rb), a capacitor (Ca), an operational amplifier A, a first field effect transistor (FET) (P1), a second FET (P2), a third FET (P3), a fourth FET (Pa), a first bipolar junction transistor (BJT) (Q1), a second BJT (Q2), and a third BJT (Q3). P3 and Rb are used to control Pa, which is configured to control current flow to a reference node, and thus a reference voltage (Vref) output by the band gap reference circuit. The band gap reference circuit is configured to output a substantially constant reference voltage and is less sensitive or susceptible to noise from a power supply. Additionally, the band gap reference circuit prevents Vref from overshooting when the band gap circuit is enabled.
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Citations
20 Claims
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1. A band gap reference circuit, comprising:
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a voltage reference circuit configured to generate an intermediate reference voltage; and a self correction circuit configured to prevent overshoot for an output reference voltage, stabilize the output reference voltage based on the intermediate reference voltage, and output the output reference voltage as a high reliability reference voltage (Vref). - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A band gap reference circuit, comprising:
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a first resistor (R1), a second resistor (R2), a third resistor (R3), a fourth resistor (Ra), and a fifth resistor (Rb); a first operational amplifier (A) comprising a first input, a second input, and an amplifier output, the second input of amplifier A connected to R2 and R3; a first field effect transistor (FET) (P1) comprising a first gate, a first source, and a first drain, the first drain of P1 connected to R1 and R2; a second FET (P2) comprising a second gate, a second source, and a second drain; a third FET (P3) comprising a third gate, a third source, and a third drain, the first gate, the second gate, and the third gate connected to the amplifier output of amplifier A; a fourth FET (Pa) comprising a fourth gate, a fourth source, and a fourth drain, the fourth source connected to the second drain and Ra, the fourth gate connected to the third drain and Rb, the fourth drain connected to a first capacitor (Ca); a first bipolar junction transistor (BJT) (Q1) comprising a first base, a first emitter, and a first collector, the first emitter connected to the first input of amplifier A and R1; a second BJT (Q2) comprising a second base, a second emitter, and a second collector, the second emitter connected to R3; and a third BJT (Q3) comprising a third base, a third emitter, and a third collector, the third emitter connected to Ra. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. A method for providing a high reliability reference voltage, comprising:
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enabling a voltage reference circuit; detecting band gap enabling function, power switching function and power noise function; preventing overshoot for an output reference voltage and stabilizing the output reference voltage based on an intermediate reference voltage; and outputting the output reference voltage as a high reliability reference voltage.
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Specification