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Transducer Clock Signal Distribution

  • US 20140281655A1
  • Filed: 03/15/2013
  • Published: 09/18/2014
  • Est. Priority Date: 03/15/2013
  • Status: Active Grant
First Claim
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1. A method, comprising:

  • receiving a clock signal at a first board controller buffer of a plurality of board controller buffers; and

    receiving the clock signal received at the first board controller buffer at a second board controller buffer and a third board controller buffer at substantially the same time from the first board controller buffer, the second board controller buffer being horizontally adjacent to the first board controller buffer and the third board controller buffer being vertically adjacent to the first board controller buffer.

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