FLOATING POINT IMAGE SENSORS WITH TILE-BASED MEMORY
First Claim
1. An image sensor, comprising:
- an array of image sensor pixels arranged in rows and columns, wherein the array is grouped into tiles each of which includes multiple rows and columns of image sensor pixels;
a first column output line that is coupled to a first column of image sensor pixels in a given tile;
a second column output line that is coupled to a second column of image sensor pixels in the given tile;
first readout circuitry that is coupled to the first column output line;
second readout circuitry that is coupled to the second column output line; and
a tile column memory circuit that is shared between the first and second readout circuitries.
5 Assignments
0 Petitions
Accused Products
Abstract
An image sensor may include an array of image sensor pixels arranged in rows and columns. Each image pixel arranged along a given column may be coupled to analog-to-digital converter (ADC) circuitry that is capable of converting analog pixel signals into a digital floating point equivalent representation. The ADC circuitry may be configured to obtain an illumination value during an auto exposure period. The illumination value, which serves as an exponent value, can be stored as tile data in a tile column memory circuit. During actual readout, the ADC circuitry may be configured to perform mantissa conversion. During mantissa conversion, the ADC circuitry may use a reference voltage value that is adjusted based on the tile data. A mantissa value that is obtained during the mantissa conversion may then be combined with the exponent value for that tile to yield a final floating number point for that image pixel.
-
Citations
20 Claims
-
1. An image sensor, comprising:
-
an array of image sensor pixels arranged in rows and columns, wherein the array is grouped into tiles each of which includes multiple rows and columns of image sensor pixels; a first column output line that is coupled to a first column of image sensor pixels in a given tile; a second column output line that is coupled to a second column of image sensor pixels in the given tile; first readout circuitry that is coupled to the first column output line; second readout circuitry that is coupled to the second column output line; and a tile column memory circuit that is shared between the first and second readout circuitries. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A method of operating an image sensor that includes an array of image sensor pixels arranged in rows and columns, wherein the array is grouped into tiles each of which includes multiple rows and columns of image sensor pixels, the method comprising:
-
with a plurality of readout circuits, receiving pixel signals from image sensor pixels that are part of a given tile; and with a tile column memory circuit that is shared among the plurality of readout circuits, outputting bits that control the plurality of readout circuit. - View Dependent Claims (12, 13, 14, 15)
-
-
16. A system, comprising:
-
a central processing unit; memory; input-output circuitry; and an imaging device, wherein the imaging device comprises; an array of image sensor pixels arranged in rows and columns, wherein the array is grouped into tiles each of which includes multiple rows and columns of image sensor pixels; a plurality of readout circuits that receive pixel signals from image sensor pixels that are part of a given tile; and a tile column memory circuit that is shared among the plurality of readout circuits and that outputs bits for controlling the plurality of readout circuit. - View Dependent Claims (17, 18, 19, 20)
-
Specification