NONVOLATILE LOGIC MEMORY FOR COMPUTING MODULE RECONFIGURATION

• US 20170109054A1
• Filed: 10/20/2015
• Published: 04/20/2017
• Est. Priority Date: 10/20/2015
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments Deutschland Gesellschaft Mit Beschrã¤Nkter Haftung (Texas Instruments, Inc.), Texas Instruments, Inc.
• Inventors: Waechter, Andreas, Khanna, Sudhanshu, Jung, Mark, Bartling, Steven Craig
• Granted Patent: US 10,452,594 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 13/4234 being a memory bus
• CPC Class Codes: H04L 67/303 Terminal profiles

Abstract

Configuration states for a computing device and/or associated peripherals (“profiles”) are stored in one or more non-volatile logic (“NVL”) arrays. Using the non-volatile sub-system for the computing device, triggers for reconfiguration of the respective device or peripherals are provided to an NVL array controller, which controls provision of the new profile(s) for the respective device or peripherals over a dedicated bus to a configuration register that stores the active profiles for the device and associated peripherals.

Claims

1. A computing device apparatus comprising:

a computing device having configuration registers configured to store configuration profile data for currently active settings of the computing device or peripherals associated with the computing device;

a system bus;

one or more non-volatile logic arrays configured to store a plurality of configuration profiles for individual settings of the computing device or peripherals associated with the computing device;

a dedicated bus separate from the system bus and connecting the one or more non-volatile logic arrays and the configuration registers;

a non-volatile logic array controller configured to control the one or more non-volatile logic arrays, receive a trigger, and in response to the trigger control transfer of at least one of the plurality of configuration profiles to associated ones of the configuration registers.

2. The computing device apparatus of claim 1 wherein the computing device is configured to generate the trigger as either or both of a software trigger or a hardware trigger.

3. The computing device apparatus of claim 1 wherein the non-volatile logic array controller is configured to receive a plurality of different triggers, wherein individual ones of the plurality of triggers effects transfer of different ones of the plurality of configuration profiles to associated ones of the configuration registers.

4. The computing device apparatus of claim 3 wherein the computing device is configured to be modifiable by a user to customize the plurality of the different triggers and associated transfer of the configuration profiles.

5. The computing device apparatus of claim 3 wherein the one or more non-volatile logic arrays are configured to store computing device or peripheral identifier information for individual ones of the plurality of configuration profiles.

6. The computing device apparatus of claim 1 further comprising a non-volatile logic array input multiplexer disposed to selectively connect via the system bus individual ones of the peripherals or computing device modules to individual rows of the one or more NVL arrays.

7. The computing device apparatus of claim 1 wherein the non-volatile logic array controller is configured to transfer at least one of the plurality of configuration profiles to associated ones of the configuration registers using a clock for a non-volatile logic sub-system for the one or more non-volatile logic arrays, the clock operating at a different clock speed than the computing device'"'"'s clock.

8. The computing device apparatus of claim 1 wherein the non-volatile logic array controller and the one or more non-volatile logic arrays are dedicated solely to storage and transfer of the configuration profiles.

9. A method comprising:

storing in configuration registers of a computing device configuration profile data for currently active settings of the computing device or peripherals associated with the computing device;

storing in one or more non-volatile logic arrays a plurality of configuration profiles for individual settings of the computing device or peripherals associated with the computing device;

in response to receiving a trigger, transferring at least one of the plurality of configuration profiles from the one or more non-volatile logic arrays to associated ones of the configuration registers over a dedicated bus separate from a system bus and connecting the one or more non-volatile logic arrays and the configuration registers.

10. The method of claim 9 further comprising generating the trigger as either or both of a software trigger or a hardware trigger.

11. The method of claim 9 further comprising receiving a plurality of different triggers, wherein receiving individual ones of the plurality of triggers effects transfer of different ones of the plurality of configuration profiles to associated ones of the configuration registers.

12. The method of claim 11 further comprising customizing the plurality of the different triggers and associated transfer of the configuration profiles in response to a user input to the computing device.

13. The method of claim 11 further comprising storing in the one or more non-volatile logic arrays computing device or peripheral identifier information for individual ones of the plurality of configuration profiles.

14. The method of claim 11 further comprising loading at least one of the plurality of configuration profiles into the one or more NVL arrays through connection to the computing device or peripherals over a dedicated bus.

15. The method of claim 9 further comprising transferring at least one of the plurality of configuration profiles to associated ones of the configuration registers using clock for the one or more non-volatile logic arrays, the clock operating at a different clock speed than the computing device'"'"'s clock.

16. A computing device apparatus comprising:

a computing device having configuration registers configured to store configuration profile data for currently active settings of the computing device or peripherals associated with the computing device;

a system bus;

one or more non-volatile logic arrays configured to store a plurality of configuration profiles for individual settings of the computing device or peripherals associated with the computing device;

a dedicated bus separate from the system bus and connecting the one or more non-volatile logic arrays and the configuration registers;

a non-volatile memory controller configured to control the one or more non-volatile logic arrays, receive a plurality of different triggers, and effecting transfer of different ones of the plurality of configuration profiles to associated ones of the configuration registers based on which of the plurality of different triggers are received by the non-volatile memory controller;

wherein the non-volatile memory controller is configured to transfer at least one of the plurality of configuration profiles to associated ones of the configuration registers using a clock for a non-volatile logic sub-system for the one or more non-volatile logic arrays, the clock operating at a higher clock speed than the computing device'"'"'s clock.

17. The computing device apparatus of claim 16 wherein the computing device is configured to generate individual one of the plurality of different triggers as either or both of a software trigger or a hardware trigger.

18. The computing device apparatus of claim 16 wherein computing device is configured to be modifiable by a user to customize the plurality of the different triggers and associated transfer of the configuration profiles.

19. The computing device apparatus of claim 16 wherein the one or more non-volatile logic arrays are configured to store module identifier information for individual ones of the plurality of configuration profiles.

20. The computing device apparatus of claim 16 wherein the non-volatile memory controller is configured to transfer at least one of the plurality of configuration profiles to associated ones of the configuration registers according to a hard-coded state machine.