SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
First Claim
1. A semiconductor device comprising:
- one or more trench gates extending in a first direction in plan view;
one or more first-conductivity-type regions spaced away from each other in the first direction, the first-conductivity-type regions being shallower than the trench gates;
one or more second-conductivity-type regions alternating with the first-conductivity-type regions in the first direction, the second-conductivity-type regions being shallower than the trench gates and deeper than the first-conductivity-type regions; and
a second-conductivity-type trench spacer region spaced away from the one or more trench gates, the trench spacer region having a higher concentration than the second-conductivity-type regions, whereinthe trench spacer region is positioned within the first-conductivity-type regions in plan view and closer to a back surface of the semiconductor device than the first-conductivity-type regions are.
1 Assignment
0 Petitions
Accused Products
Abstract
A semiconductor device includes one or more trench gates extending in a first direction in plan view, one or more first-conductivity-type regions spaced away from each other in the first direction, where the first-conductivity-type regions are shallower than the trench gates, one or more second-conductivity-type regions alternating with the first-conductivity-type regions in the first direction, where the second-conductivity-type regions are shallower than the trench gates and deeper than the first-conductivity-type regions, and a second-conductivity-type trench spacer region spaced away from the one or more trench gates, where the trench spacer region has a higher concentration than the second-conductivity-type regions. Here, the trench spacer region is positioned within the first-conductivity-type regions in plan view and closer to a back surface of the semiconductor device than the first-conductivity-type regions are.
-
Citations
15 Claims
-
1. A semiconductor device comprising:
-
one or more trench gates extending in a first direction in plan view; one or more first-conductivity-type regions spaced away from each other in the first direction, the first-conductivity-type regions being shallower than the trench gates; one or more second-conductivity-type regions alternating with the first-conductivity-type regions in the first direction, the second-conductivity-type regions being shallower than the trench gates and deeper than the first-conductivity-type regions; and a second-conductivity-type trench spacer region spaced away from the one or more trench gates, the trench spacer region having a higher concentration than the second-conductivity-type regions, wherein the trench spacer region is positioned within the first-conductivity-type regions in plan view and closer to a back surface of the semiconductor device than the first-conductivity-type regions are. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A manufacturing method for a semiconductor device including a trench gate extending in a first direction in plan view and a plurality of first-conductivity-type regions and a plurality of second-conductivity-type regions alternating with each other in the first direction, the manufacturing method comprising:
-
forming a plurality of first-conductivity-type regions so as to be spaced away from each other in the first direction; implanting ions into the plurality of first-conductivity-type regions; and forming a trench spacer region of a second conductivity type so as to be spaced away from the trench gate, wherein the trench spacer region overlaps a given one of the plurality of first-conductivity-type regions in plan view and is positioned closer to a back surface of the semiconductor device than the given first-conductivity-type region is. - View Dependent Claims (12, 13, 14, 15)
-
Specification