SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF

• US 20180019115A1
• Filed: 05/04/2017
• Published: 01/18/2018
• Est. Priority Date: 07/13/2016
• Status: Active Grant

• Current Assignee: GlobalWafers Co., Ltd. (Sino-American Silicon Products Incorporated)
• Original Assignee: GlobalWafers Co., Ltd. (Sino-American Silicon Products Incorporated)
• Inventors: Fan, Chun-I, Chuang, Chih-Yuan, Shih, Ying-Ru, Hsu, Wen-Ching
• Granted Patent: US 10,475,637 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/02021 Edge treatment, chamfering
• CPC Class Codes: H01L 21/265 producing ion implantation
• CPC Class Codes: H01L 21/324 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/20 - H01L21/288 and H01L21/302 - H01L21/322 take precedence
• CPC Class Codes: H01L 29/32 the imperfections being within the semiconductor body

Abstract

A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate has an epitaxy region located at a central portion of a main plane of the semiconductor substrate, a periphery region surrounding the epitaxy region and an injured region distributed inside the periphery region.

Claims

1. A semiconductor substrate, comprising:

an epitaxy region, located at a central portion of a main plane of the semiconductor substrate;

a periphery region, surrounding the epitaxy region; and

an injured region, distributed inside the periphery region.

2. The semiconductor substrate as recited in claim 1, wherein the main plane of the semiconductor substrate is surrounded by a bevel portion which is manufactured by a deformation process, and the bevel portion is located in the periphery region.

3. The semiconductor substrate as recited in claim 2, wherein the injured region is located in an upper portion of the bevel portion.

4. The semiconductor substrate as recited in claim 2, wherein the injured region is located in the bevel portion.

5. The semiconductor substrate as recited in claim 1, wherein the injured region is located inside the semiconductor substrate and at a place relatively far away from a surface of the semiconductor substrate, and the injured region is relatively far away from an outer edge of the semiconductor substrate.

6. The semiconductor substrate as recited in any one of claim 1, wherein a depth distribution range of the injured region extends downward from the surface of the semiconductor substrate to more than 3 micrometers (μ

m).

7. The semiconductor substrate as recited in any one of claim 1, wherein the periphery region comprises a tough region.

8. The semiconductor substrate as recited in claim 5, wherein a depth distribution range of the injured region extends downward from a place at a distance more than 2 μ

m from the surface of the semiconductor substrate.

9. The semiconductor substrate as recited in claim 5, wherein the injured region is relatively away from the outer edge of the semiconductor substrate by a distance less than or equal to 3 mm.

10. The semiconductor substrate as recited in claim 5, wherein the injured region is strip-shaped, and a width of the injured region is less than 100 μ

m.

11. The semiconductor substrate as recited in claim 5, wherein the outer edge of the semiconductor substrate has a flat edge, and the injured region is close two corners of the flat edge.

12. The semiconductor substrate as recited in claim 11, wherein the injured region is ring-shaped.

13. The semiconductor substrate as recited in claim 5, wherein the injured region is an amorphous region, a polycrystalline region or a microcrystalline region.

14. A manufacturing method of a semiconductor substrate, comprising:

providing a semiconductor substrate; and

forming an injured region inside a periphery region of the semiconductor substrate.

15. The manufacturing method of the semiconductor substrate as recited in claim 14, wherein the step of forming the injured region comprises:

performing a sandblasting process, a stealth laser process or an ion implantation process to form the injured region inside the periphery region.

16. The manufacturing method of the semiconductor substrate as recited in claim 15, wherein the step of forming the injured region further comprises:

heating the semiconductor substrate after performing the ion implantation process.