Low temperature silicon wafer bond process with bulk material bond strength
First Claim
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1. A method for bonding one semiconductor surface to a second semiconductor surface, comprising:
- providing an article that has a semiconductor surface;
providing a second article that has a semiconductor surface;
annealing the semiconductor surfaces in a state of separation under a vacuum with an energy source wherein energy from the energy source is substantially confined to the semiconductor surfaces; and
contacting the semiconductor surface of the article to the second semiconductor surface of the second article to form a bond after annealing, while in a vacuum.
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Abstract
The present invention includes a method for bonding one semiconductor surface to a second semiconductor surface. The method includes providing a first article that has a semiconductor surface and a second article that has a semiconductor surface. The semiconductor surfaces are annealed with an energy source wherein energy is confined to the semiconductor surfaces. The annealed surfaces are bonded to each other.
177 Citations
26 Claims
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1. A method for bonding one semiconductor surface to a second semiconductor surface, comprising:
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providing an article that has a semiconductor surface;
providing a second article that has a semiconductor surface;
annealing the semiconductor surfaces in a state of separation under a vacuum with an energy source wherein energy from the energy source is substantially confined to the semiconductor surfaces; and
contacting the semiconductor surface of the article to the second semiconductor surface of the second article to form a bond after annealing, while in a vacuum. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method for bonding one semiconductor wafer to another semiconductor wafer in order to maximize area and volume of a bonded wafer, comprising:
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providing first and second semiconductor wafers;
annealing surfaces of the semiconductor wafers in a state of separation under vacuum with an energy source wherein energy from the energy source is substantially confined to the semiconductor surfaces and energy is sequentially applied to a fraction of each of the surfaces; and
bonding the annealed surfaces to each other, while under vacuum. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26)
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Specification