Semiconductor memory device
First Claim
1. A semiconductor memory devicea semiconductor substrate;
- and memory cells formed on the semiconductor substrate via an insulating film, each of the memory cells being a unit for storing one bit data and each of the memory cells consisting of one full depletion type MISFET, wherein each of the memory cells comprises;
a semiconductor layer formed on the insulating film;
a source region formed in the semiconductor layer;
a drain region formed apart from the source region in the semiconductor layer, the semiconductor layer between the source region and the drain region serving as a channel body in a floating state;
a main gate formed on a first side of the channel body to form a channel in the channel body; and
an auxiliary gate formed on a second side of the channel body, the second side being opposite to the first side, wherein the MISFET has a first data state in which the majority carriers are accumulated in a portion of the second side of the channel body and a second data state in which the majority carriers accumulated in the portion of the second side of the channel body are emitted.
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Accused Products
Abstract
A semiconductor memory device has full depletion type MISFETs to constitute memory cells (MC) on a semiconductor substrate (11) via an insulating film (12). Each MISFET has a semiconductor layer (13), a source region (16), a drain region (17), the semiconductor layer between the source region and the drain region serving as a channel body in a floating state, a main gate (15) on a first side of the channel body, and an auxiliary gate (18) on a second side of the channel body. With a state, in which the channel body is fully depleted by an electric field from the main gate and a portion of the second side of the channel body is capable of accumulating majority carriers by an electric field from the auxiliary gate, as a reference state, the MISFET has a first data state in which the majority carriers are accumulated and a second data state in which the majority carriers are emitted.
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Citations
10 Claims
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1. A semiconductor memory device
a semiconductor substrate; - and
memory cells formed on the semiconductor substrate via an insulating film, each of the memory cells being a unit for storing one bit data and each of the memory cells consisting of one full depletion type MISFET, wherein each of the memory cells comprises;
a semiconductor layer formed on the insulating film;
a source region formed in the semiconductor layer;
a drain region formed apart from the source region in the semiconductor layer, the semiconductor layer between the source region and the drain region serving as a channel body in a floating state;
a main gate formed on a first side of the channel body to form a channel in the channel body; and
an auxiliary gate formed on a second side of the channel body, the second side being opposite to the first side, wherein the MISFET has a first data state in which the majority carriers are accumulated in a portion of the second side of the channel body and a second data state in which the majority carriers accumulated in the portion of the second side of the channel body are emitted. - View Dependent Claims (2, 3, 4, 5)
wherein the first data state is set by the impact ionization generated near a drain junction with a pentode operation of the MISFET, and the second data state is set by sending a forward bias current between the channel body and the drain region. -
3. The semiconductor memory device according to claim 1, wherein the first side of the channel body is a top side face of the semiconductor layer, the second side of the channel body is a back side face of the semiconductor layer and the main gate is formed on a top side face via a gate insulating film.
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4. The semiconductor memory device according to claim 3, wherein the auxiliary gate is an impurity diffusion layer formed on the semiconductor substrate.
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5. The semiconductor memory device according to claim 3, wherein the auxiliary gate is an impurity doping layer buried between the semiconductor substrate and the insulating film.
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6. A semiconductor memory device having full depletion type MISFETs to constitute memory cells on a semiconductor substrate via an insulating film, each of the MISFETs comprising:
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a semiconductor layer formed on the insulating film;
a source region formed in the semiconductor layer;
a drain region formed apart from the source region in the semiconductor layer, the semiconductor layer between the source region and the drain region serving as a channel body in a floating state;
a main gate formed on a first side of the channel body to form a channel in the channel body; and
an auxiliary gate formed on a second side of the channel body, the second side being opposite to the first side, the auxiliary gate being connected to an auxiliary gate terminal to which a constant voltage is applied, wherein the MISFET has a first data state in which the majority carriers are accumulated in a portion of the second side of the channel body and a second data state in which the majority carriers accumulated in the portion of the second side of the channel body are emitted. - View Dependent Claims (7, 8, 9, 10)
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Specification