Spread-spectrum high data rate system and method
DCFirst Claim
1. A spread-spectrum transmitter for sending data over a communications channel, comprising:
- a forward-error-correction (FEC) encoder for encoding, with an FEC code, the data as FEC data;
an interleaver, coupled to said FEC encoder, for interleaving the FEC data as interleaved data;
a memory, coupled to said interleaver, for storing N bits of interleaved data as stored data, with N a number of bits in a symbol;
a chip-sequence encoder, coupled to said memory, for selecting, responsive to the N bits of stored data, a chip-sequence signal from 2N chip-sequence signals stored in said chip-sequence encoder, as an output chip-sequence signal of said chip-sequence encoder; and
a transmitter section, coupled to said chip-sequence encoder, for transmitting the output chip-sequence signal as a radio wave, at a carrier frequency, over said communications channel, as a spread-spectrum signal.
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Litigations
1 Petition
Accused Products
Abstract
A high data rate, high processing gain, direct sequence spread spectrum system that transmits a BPSK or QPSK signal. The data which are collected and stored and forwarded N bits at a time by transmitting one of 2N pseudo random waveforms every time N bits are collected. During acquisition, product devices multiply a received spread-spectrum signal by a header chip-sequence signal. After acquisition, the product device multiply the received spread-spectrum signal by 2N chip-sequence signals to generate products, with each chip-sequence signal of the chip-sequences signals being different from other chip-sequence signals of the chip-sequence signals. Integrators integrate the products thereby forming 2N correlators, and a comparator selects a largest value from the integrators. The largest value is decoded into N bits of data.
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Citations
8 Claims
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1. A spread-spectrum transmitter for sending data over a communications channel, comprising:
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a forward-error-correction (FEC) encoder for encoding, with an FEC code, the data as FEC data;
an interleaver, coupled to said FEC encoder, for interleaving the FEC data as interleaved data;
a memory, coupled to said interleaver, for storing N bits of interleaved data as stored data, with N a number of bits in a symbol;
a chip-sequence encoder, coupled to said memory, for selecting, responsive to the N bits of stored data, a chip-sequence signal from 2N chip-sequence signals stored in said chip-sequence encoder, as an output chip-sequence signal of said chip-sequence encoder; and
a transmitter section, coupled to said chip-sequence encoder, for transmitting the output chip-sequence signal as a radio wave, at a carrier frequency, over said communications channel, as a spread-spectrum signal.
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2. An improvement to a spread-spectrum transmitter for sending data over a communications channel, comprising:
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memory means for storing N bits of data as stored data, with N a number of bits in a symbol;
chip-encoder means, coupled to said memory means, for selecting, responsive to the N bits of stored data, a chip-sequence signal from a plurality of 2N chip-sequence signals stored in said chip-sequence encoder, as an output chip-sequence signal of said chip-encoder means; and
a transmitter section, coupled to said chip-encoder means, for transmitting the output chip-sequence signal as a radio wave, at a carrier frequency, over said communications channel, as a spread-spectrum signal.
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3. An improvement to a spread-spectrum transmitter for sending data over a communications channel, comprising:
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a memory for storing N bits of data as stored data, with N a number of bits in a symbol;
a chip-sequence encoder, coupled to said memory, for selecting, responsive to the N bits of stored data, a chip-sequence signal from a plurality of chip-sequence signals stored in said chip-sequence encoder, as an output chip-sequence signal; and
a transmitter section, coupled to said chip-sequence encoder, for transmitting the output chip-sequence signal as a radio wave, at a carrier frequency, over said communications channel, as a spread-spectrum signal.
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4. A spread-spectrum method improvement for sending data over a communications channel, comprising the steps of:
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storing, at a transmitter, N bits of interleaved data as stored data, with N a number of bits in a symbol;
selecting, at said transmitter in response to the N bits of stored data, a chip-sequence signal from a plurality of 2N chip-sequence signals, as an output chip-sequence signal; and
transmitting, at said transmitter, the output chip-sequence signal as a radio wave, at a carrier frequency, over said communications channel, as a spread-spectrum signal.
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5. A spread-spectrum receiver for receiving data in a spread-spectrum signal from a communications channel, comprising:
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a receiver section, coupled to said communications channel, for translating the spread-spectrum signal to a processing frequency as a received spread-spectrum signal;
a plurality of product devices, coupled to said receiver section, for multiplying, at the processing frequency, for acquisition, the received spread-spectrum signal by a header chip-sequence signal with each chip-sequence signal having an identical chip sequence as the header chip-sequence signal, each chip-sequence signal having a delay of one-half or one chip, relative to one another and having a different delay from other chip-sequence signals;
said plurality of product devices for multiplying, after acquisition, the received spread-spectrum signal by the plurality of 2N chip-sequence signals, with each chip-sequence signal from the plurality of 2N chip-sequence signals having a different chip sequence from other chip-sequence signals in the plurality of 2N chip-sequence signals, respectively;
a plurality of integrators coupled to said plurality of product devices, respectively, for integrating a plurality of products from the plurality of product devices during a period of a chip-sequence signal thereby forming 2N correlators;
a comparator, coupled to said plurality of integrators, for selecting a largest value from the plurality of integrators;
a chip-sequence decoder, coupled to said comparator, for decoding the largest value from a respective integrator of said plurality of integrators, into N bits of interleaved data;
a deinterleaver, coupled to said chip-sequence decoder, for deinterleaving a series of interleaved bits from said chip-sequence decoder, as deinterleaved data; and
a FEC decoder, coupled to said deinterleaver, for FEC decoding the deinterleaved data as estimated data.
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6. An improvement to a spread-spectrum receiver for receiving data in a spread-spectrum signal from a communications channel, comprising:
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a receiver section, coupled to said communications channel, for translating the spread-spectrum signal to a processing frequency as a received spread-spectrum signal;
spread-spectrum means, coupled to said receiver section, for processing, at the processing frequency, for acquisition, the received spread-spectrum signal by a header chip-sequence signal from the plurality of chip-sequence signals, with each chip-sequence signal of the plurality of chip-sequence signals set for having an identical chip sequence as the header chip-sequence signal, each chip-sequence signal having a delay of one-half or one chip, with each chip-sequence signal from the plurality of chip-sequence signals having a different delay from other chip-sequence signals, said spread-spectrum means for processing, after acquisition, the received spread-spectrum signal by the plurality of chip-sequence signals with each chip-sequence signal from the plurality of chip-sequence signals having a different chip sequence from other chip-sequence signals in the plurality of chip-sequence signals, respectively;
integrator means coupled to said spread-spectrum means, for integrating a plurality of output signals from said spread-spectrum means during a period of a chip-sequence signal;
comparator means, coupled to said integrator means, for selecting a largest value from said integrator means; and
chip-decoder means, coupled to said comparator means, for decoding the largest value from said integrator means into N bits of estimated data.
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7. An improvement to a spread-spectrum receiver for receiving data in a spread-spectrum signal from a communications channel, comprising:
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a receiver section, coupled to said communications channel, for translating the spread-spectrum signal to a processing frequency as a received spread-spectrum signal;
a plurality of product devices, coupled to said receiver section, for multiplying, at the processing frequency, for acquisition, the received spread-spectrum signal by a header chip-sequence signal from the plurality of chip-sequence signals, with each chip-sequence signal of the plurality of chip-sequence signals set having an identical chip sequence as the header chip-sequence signal, each chip-sequence signal having a delay of at most one chip, with each chip-sequence signal from the plurality of chip-sequence signals having a different delay from other chip-sequence signals, said plurality of product devices for multiplying, after acquisition, the received spread-spectrum signal by the plurality of chip-sequence signals, with each chip-sequence signal from the plurality of chip-sequence signals having a different chip sequence from other chip-sequence signals in the plurality of chip-sequence signals, respectively;
a plurality of integrators coupled to said plurality of product devices, respectively, for integrating a plurality of products from the plurality of product devices during a period of a chip-sequence signal;
a comparator, coupled to said plurality of integrators, for selecting a largest value from the plurality of integrators; and
a chip-sequence decoder, coupled to said comparator, for decoding the largest value from a respective integrator of said plurality of integrators, into N bits of interleaved data.
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8. A spread-spectrum method improvement for receiving data in a spread-spectrum signal from a communications channel, comprising the steps of:
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translating, at a receiver, the spread-spectrum signal to a processing frequency as a received spread-spectrum signal;
multiplying, at the processing frequency, for acquisition, the received spread-spectrum signal by a header chip-sequence signal from the plurality of chip-sequence signals, with each chip-sequence signal of the plurality of 2N chip-sequence signals set for having an identical chip sequence as the header chip-sequence signal, each chip-sequence signal having a delay of at most one chip, with each chip-sequence signal from the plurality of chip-sequence signals having a different delay from other chip-sequence signals;
multiplying, after acquisition, the received spread-spectrum signal by the plurality of chip-sequence signals, with each chip-sequence signal from the plurality of chip-sequence signals having a different chip sequence from other chip-sequence signals in the plurality of chip-sequence signals, respectively;
integrating a plurality of products from the plurality of product devices during a period of a chip-sequence signal;
selecting a largest value from the plurality of integrators; and
decoding the largest value from a respective integrator of said plurality of integrators into N bits of interleaved data.
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Specification