Method of making a semiconductor device having a low K dielectric
DCFirst Claim
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1. A method comprising:
- forming a dielectric overlying a substrate of a wafer, wherein the forming the dielectric further comprises;
forming a low K dielectric layer overlying the substrate by a chemical vapor deposition (CVD) process using a silicon precursor, wherein a dielectric constant of the low K dielectric layer is less than 3.0;
forming a second dielectric layer overlying the low K dielectric layer by a CVD process using the silicon precursor;
forming a void in the dielectric including in the low K dielectric layer and the second dielectric layer;
depositing a material over the wafer including depositing the material in the void;
removing portions of the material exterior to the void by polishing the wafer with a chemical mechanical polishing (CMP) process wherein the polishing removes at least some of the second dielectric layer.
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Abstract
A low K dielectric layer and a cap for the low K dielectric layer are formed in situ using the same silicon precursors but at different precursor ratios. The low K dielectric is deposited with precursors that are useful for making a low K dielectric. Trenches are formed in the low K dielectric and are filled by a metal layer. Chemical mechanical processing (CMP) is utilized to remove the metal outside the trench while the cap aids planarity outside the trench.
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Citations
22 Claims
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1. A method comprising:
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forming a dielectric overlying a substrate of a wafer, wherein the forming the dielectric further comprises;
forming a low K dielectric layer overlying the substrate by a chemical vapor deposition (CVD) process using a silicon precursor, wherein a dielectric constant of the low K dielectric layer is less than 3.0;
forming a second dielectric layer overlying the low K dielectric layer by a CVD process using the silicon precursor;
forming a void in the dielectric including in the low K dielectric layer and the second dielectric layer;
depositing a material over the wafer including depositing the material in the void;
removing portions of the material exterior to the void by polishing the wafer with a chemical mechanical polishing (CMP) process wherein the polishing removes at least some of the second dielectric layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method of making a dielectric comprising:
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forming a low K dielectric layer overlying a wafer substrate by a chemical vapor deposition (CVD) that includes providing plasma using a silicon precursor and oxygen at a first ratio of silicon precursor to oxygen, the silicon precursor including at least one of a OctaMethylCycloTetraSiloxane(OMCTS) material and a TetraMethylCycloTetraSiloxane(TMCTS) material, wherein a dielectric constant of the low K dielectric layer is less than 3.0, and forming a second dielectric layer on the low K dielectric layer by a CVD process that includes providing plasma using the silicon precursor and oxygen at a second ratio of silicon precursor to oxygen;
wherein the first ratio is greater than the second ratio. - View Dependent Claims (19, 20)
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21. A semiconductor device comprising:
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a substrate;
an interconnect overlying the substrate, the interconnect comprising;
a dielectric overlying the substrate, the dielectric including a low K dielectric layer and a second dielectric layer overlying the low K dielectric layer, the low K dielectric layer having a dielectric constant of less than 3.0, the second dielectric layer having a silicon to carbon intensity ratio of less than about 175 to 1 by time of flight secondary ion mass spectroscopy; and
a conductive interconnect structure located in a void of the dielectric, the void including a void in the low K dielectric layer and a void in the second dielectric layer;
wherein the second dielectric layer and the conductive interconnect structure each have a surface substantially coplanar with each other.
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22. A method comprising:
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forming a dielectric overlying a substrate of a wafer, wherein the forming the dielectric further comprises;
forming a low K dielectric layer overlying the substrate by a chemical vapor deposition (CVD) that includes providing plasma using a silicon precursor and oxygen at a first ratio of silicon precursor to oxygen, the silicon precursor including at least one of a OctaMethylCycloTetraSiloxane(OMCTS) material and a TetraMethylCycloTetraSiloxane(TMCTS) material;
forming a second dielectric layer overlying the low K dielectric layer by a CVD process that includes providing plasma using the silicon precursor and oxygen at a second ratio of silicon precursor to oxygen;
wherein the first ratio is greater than the second ratio;
forming a void in the dielectric including in the low K dielectric layer and the second dielectric layer;
depositing a material over the wafer including depositing the material in the void; and
removing portions of the material exterior to the void by polishing the wafer with a chemical mechanical polishing (CMP) process wherein the polishing removes at least some of the second dielectric layer.
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Specification