High dielectric constant metal oxide gate dielectrics

• US 6,998,357 B2
• Filed: 08/22/2003
• Issued: 02/14/2006
• Est. Priority Date: 12/15/1998
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Doyle, Brian S., Bai, Gang, Cheng, Peng, Liang, Chunlin, Fraser, David B.
• Primary Examiner(s): Thomas, Tom
• Assistant Examiner(s): RICHARDS, N DREW
• Application Number:
  US10/646,034
• Publication Number:
  US 20050087820A1
• Time in Patent Office: 907 Days
• Field of Search: 438/216, 438/287, 438/591, 438/608, 438/685, 438/765, 438/770, 438/785
• US Class Current: 438/785
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28211 in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer H01L21/28194 and H01L21/28202 take precedence
• CPC Class Codes: H01L 21/28229 by deposition of a layer, e.g. metal, metal compound or poysilicon, followed by transformation thereof into an insulating layer
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence

Abstract

A method of forming a dielectric layer suitable for use as the gate dielectric layer of a metal-oxide-semiconductor field effect transistor (MOSFET) includes oxidizing the surface of a silicon substrate, forming a metal layer over the oxidized surface, and reacting the metal with the oxidized surface to form a substantially intrinsic layer of silicon superjacent the substrate, wherein at least a portion of the silicon layer may be an epitaxial silicon layer, and a metal oxide layer superjacent the silicon layer. In a further aspect of the present invention, an integrated circuit includes a plurality of MOSFETs, wherein various ones of the plurality of transistors have metal oxide gate dielectric layers and substantially intrinsic silicon layers subjacent the metal oxide dielectric layers.

Claims

1. A method of forming a gate dielectric layer, comprising:

forming an oxide layer on a surface of a substrate;

forming a metal layer over the oxide layer;

reacting at least a first portion of the metal layer with the oxide layer to form a metal oxide dielectric; and

forming a gate electrode over said metal oxide dielectric.

2. The method of claim 1, further comprising reacting a second portion of the metal layer with an oxidizing ambient.

3. The method of claim 1, wherein reacting at least a first portion of the metal layer with the oxide layer comprises heating to a temperature greater than approximately 600°

C.

4. The method of claim 1, further comprising forming a source region and a drain region in said semiconductor substrate on opposite sides of said gate electrode.

5. The method of claim 1, wherein said oxide layer is a silicon dioxide layer formed to a thickness between 5–

100 Å

.

6. The method of claim 1, wherein said metal layer is formed to a thickness between 100–

200 Å

.

7. The method of claim 1, wherein said metal layer is a metal that does not react with silicon to form a silicide.

8. The method of claim 7, wherein said metal layer is selected from the group consisting of hafnium and zirconium.

9. The method of claim 1, wherein said forming said metal layer and said reacting said metal layer with said oxide layer occurs in the same chamber.

10. A method of forming a gate dielectric layer comprising:

thermally growing an oxide layer on a surface of a silicon film;

forming a metal layer over said oxide layer, wherein said metal layer is formed from a metal which does not react with silicon to form a silicide;

reacting at least a first portion of said metal layer with said silicon oxide layer to form a metal oxide dielectric; and

forming a gate electrode onto said metal oxide dielectric.

11. The method of claim 10, wherein said forming said metal layer and said reacting said first portion of the metal with said oxide occurs in the same chamber.

12. The method of claim 10, wherein said silicon oxide layer is thermally grown to a thickness between 5–

100 Å

.

13. A method of forming a dielectric layer comprising:

forming an oxide layer on a surface of a silicon film;

forming a metal layer over said oxide layer in a chamber under vacuum; and

reacting at least a first portion of the metal layer with said oxide layer to form a metal oxide dielectric in said chamber without breaking said vacuum.

14. The method of claim 13, further comprising forming an electrode over said metal oxide dielectric.

15. The method of claim 14, wherein said electrode is a gate electrode.

16. The method of claim 15, further comprising forming a source region and drain region in said silicon film on opposite sides of said gate electrode.