Variable pixel clock electronic shutter control
First Claim
Patent Images
1. An image sensor, comprisingan array of image sensing elements;
- a controller for said array of image sensing elements, producing a rolling shutter and outputting first clock signals to control said array of image sensing elements; and
a second clock signal generating element associated with said controller, which produces a second clock signal during a time when said rolling shutter is being changed from a first characteristic to a second characteristic, and outputting said second clock signal at the same time as said first clock signals during an interim frame period, and thereafter using said second clock signal to produce a new rolling shutter at a rate associated with said second clock signal.
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Abstract
CMOS image sensor with a rolling shutter that uses two separate clocks. One of the clocks is used during normal operation. When timing is changed, the other clock is started and used during an interim period to avoid distortion in the image. After that interim period, the new clock timing is coupled to the original clock circuit.
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Citations
13 Claims
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1. An image sensor, comprising
an array of image sensing elements; -
a controller for said array of image sensing elements, producing a rolling shutter and outputting first clock signals to control said array of image sensing elements; and a second clock signal generating element associated with said controller, which produces a second clock signal during a time when said rolling shutter is being changed from a first characteristic to a second characteristic, and outputting said second clock signal at the same time as said first clock signals during an interim frame period, and thereafter using said second clock signal to produce a new rolling shutter at a rate associated with said second clock signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method, comprising:
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controlling an image sensor using a first clock and a second clock which are different; using said first clock for starting integration times during a first frame, and using said second clock to end integration times during said first frame; and using said second clock to start and end integration times during a second frame, subsequent to said first frame. - View Dependent Claims (10, 11, 12, 13)
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Specification