Apparatus for accessing an active pixel sensor array
First Claim
Patent Images
1. A circuit comprising:
- a decoder for receiving a memory address within a memory address space of a processor, and converting said memory address into a row signal to drive a row of an active pixel sensor array, and a column signal to drive a column of said active pixel sensor array, wherein said row signal and said column signal designate a position of a pixel in said active pixel sensor array.
3 Assignments
0 Petitions
Accused Products
Abstract
A circuit includes a decoder for receiving an address within an address space of a processor and for accessing a pixel in an active pixel sensor array based on the address. The decoder maps the active pixel sensor array to the address space. The circuit can also provide sequencing of these addresses such that a group of pixels can be read out without additional addressing from a processor. There is also provided a method of processing pixel imperfections in real time. Pixel integration can be programmed on any single pixel or group of pixels in the array as well as windowed readout. A method of target discrimination is also disclosed.
-
Citations
34 Claims
-
1. A circuit comprising:
a decoder for receiving a memory address within a memory address space of a processor, and converting said memory address into a row signal to drive a row of an active pixel sensor array, and a column signal to drive a column of said active pixel sensor array, wherein said row signal and said column signal designate a position of a pixel in said active pixel sensor array. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
-
12. An integrated circuit, comprising:
-
an active pixel sensor array, and a decoder for receiving a memory address within a memory address space of a processor, converting said memory address into a row signal to drive a row of an active pixel sensor array, and a column signal to drive a column of said active pixel sensor array, wherein said row signal and said column signal designate a position of a pixel in said active pixel sensor array, and accessing said pixel based on said row signal and said column signal, wherein said decoder maps said active pixel sensor array to said memory address space. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21)
-
-
22. A system comprising:
-
an active pixel sensor array; a decoder for receiving a memory address, converting said memory address into a row signal to drive a row of an active pixel sensor array, and a column signal to drive a column of said active pixel sensor array, wherein said row signal and said column signal designate a position of a pixel in an active pixel sensor array, and accessing said pixel of said active pixel sensor array based on said row signal and said column signal; a converter for representing a charge read from said pixel as a digital value; and a microprocessor for providing said memory address and receiving said digital value, wherein said memory address is within a memory address space of said microprocessor, and wherein said decoder maps said active pixel sensor array to said memory address space. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34)
-
Specification