Process for interfacial adhesion in laminate structures through patterned roughing of a surface

• US 7,303,994 B2
• Filed: 06/14/2004
• Issued: 12/04/2007
• Est. Priority Date: 06/14/2004
• Status: Expired due to Fees

• Current Assignee: Alsephina Innovations Inc. (Quarterhill Inc. (f/k/a Wi-LAN Inc.))
• Original Assignee: International Business Machines Corporation
• Inventors: Cooney, Edward C. III, Stamper, Anthony K., Colburn, Matthew E., McGahay, Vincent, Shaw, Thomas M
• Primary Examiner(s): Smith; Matthew
• Assistant Examiner(s): Tobergte; Nicholas J.
• Application Number:
  US10/710,034
• Publication Number:
  US 20050277266A1
• Time in Patent Office: 1,268 Days
• Field of Search: 438/745, 438/694, 257/E21.023
• US Class Current: 438/694
• CPC Class Codes: H01L 21/31144 using masks
• CPC Class Codes: H01L 21/76828 thermal treatment
• CPC Class Codes: H01L 21/76829 characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304

Abstract

The present invention relates to a process for improved interfacial adhesion of dielectrics using patterned roughing. Improved adhesion strength between layers and substrates can be achieved through increasing the roughness of the interface between the materials. Roughness may including any disturbance of an otherwise generally smooth surface, such as grooves, indents, holes, trenches, and/or the like. Roughing on the interface may be achieved by depositing a material on a surface of the substrate to act as a mask and then using an etching process to induce the roughness. The material, acting as a mask, allows etching to occur on a fine, or sub-miniature, scale below the Scale achieved with a conventional photo mask and lithography to achieve the required pattern roughing. Another material is then deposited on the roughened surface of the substrate, filling in the roughing and adhering to the substrate.

Claims

1. A process for joining surfaces of portions of a semiconductor device, comprising the steps of:

providing a substrate composed of a first dielectric material having a first surface;

depositing a film containing metal on the first surface;

annealing the film to form metal islands on the first surface;

forming a roughing on the substrate by etching the first surface, wherein the metal islands act as a mask for the etching;

removing the metal islands from the first surface; and

depositing a second dielectric material having a second surface on the first surface such that the second surface is joined to the first surface and substantially fills in the roughing.

2. The process according to claim 1, where the mask is a fine scale photo mask and the etching is performed using a lithographic process.

3. The process according to claim 1, wherein the metal comprises Sn or In.

4. The process according to claim 1, wherein the metal comprises a water soluble metal.

5. The process according to claim 1, wherein the roughing has a depth of about 200 Å

.