Display device

• US 7,554,116 B2
• Filed: 05/26/2005
• Issued: 06/30/2009
• Est. Priority Date: 05/13/2002
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Osame, Mitsuaki, Murakami, Satoshi, Yamazaki, Shunpei
• Primary Examiner(s): Huynh; Andy
• Application Number:
  US11/137,491
• Publication Number:
  US 20050218452A1
• Time in Patent Office: 1,496 Days
• Field of Search: 257/59, 257/72, 257/40, 257/344, 257/408, 257/E21.413, 257/E21.414, 257/E29.117
• US Class Current: 257/59
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/4958 with a multiple layer structure
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H10K 2102/3026 Top emission
• CPC Class Codes: H10K 50/84 Passivation; Containers; Encapsulations
• CPC Class Codes: H10K 50/841 Self-supporting sealing arrangements
• CPC Class Codes: H10K 50/844 Encapsulations
• CPC Class Codes: H10K 50/856 comprising reflective means
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/121 characterised by the geometry or disposition of pixel elements
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements

Abstract

A display device according to the present invention includes: a planarization layer for insulating between a gate electrode etc. and a data wiring, a drain electrode, or the like of the transistor; and a barrier layer that is formed on an upper surface or lower surface of the planarization layer and at the same time, adapted to suppress diffusion of moisture or degassing components from the planarization layer. The display device adopts a device structure effective in reducing the plasma damage on the planarization layer by devising a positional relationship between the planarization layer and the barrier layer. Also, in combination with a novel structure as a structure for a pixel electrode, effects such as an increase in luminance can be provided as well.

Claims

1. A display device comprising:

a thin film transistor formed over a substrate, wherein the thin film transistor comprises a semiconductor film and a gate electrode with a gate insulating film interposed therebetween;

a barrier layer formed over the gate electrode;

a first planarization layer formed over the barrier layer;

an electrode formed over the first planarization layer, wherein the electrode is electrically connected to the semiconductor film;

a second planarization layer formed over the first planarization layer, wherein the second planarization layer covers a portion of the electrode, and wherein a side surface of the second planarization layer is rounded;

a pixel electrode formed over the second planarization layer, wherein the pixel electrode is in direct planar contact with an upper surface of the electrode;

a resin film formed over the second planarization layer, wherein the resin film covers a portion of the pixel electrode, and wherein a side surface of the resin film is rounded; and

a light emitting member formed on the pixel electrode.

2. A display device according to claim 1, wherein the barrier layer comprises silicon nitride.

3. A display device according to claim 1, wherein the first planarization layer comprises an inorganic insulating film formed by spin-coating.

4. A display device according to claim 1, wherein the first planarization layer comprises an inorganic insulating film leveled by polishing.

5. A display device according to claim 1, wherein the pixel electrode comprises an oxide conductive film.

6. A display device according to claim 1, wherein the pixel electrode comprises a metal film.

7. A display device according to claim 1, wherein the light emitting member comprises an organic compound or an inorganic compound.

8. A display device according to claim 1, wherein the display device is incorporated in at least one selected from the group consisting of a television, a digital camera, a personal computer, a mobile computer, an image reproducing apparatus, a goggle-type display, a video camera, and a cellular phone.

9. A display device comprising:

a thin film transistor formed over a substrate, wherein the thin film transistor comprises a semiconductor film and a gate electrode with a gate insulating film interposed therebetween;

a barrier layer formed over the gate electrode;

a first planarization layer formed over the barrier layer;

an electrode formed over the first planarization layer, wherein the electrode is electrically connected to the semiconductor film through a contact hole opened in the barrier layer and the first planarization layer;

a second planarization layer formed over the first planarization layer, wherein the second planarization layer covers a portion of the electrode, and wherein a sided surface of the second planarization layer is rounded;

a pixel electrode formed over the second planarization layer, wherein the pixel electrode is in direct planar contact with an upper surface of the electrode;

a resin film formed over the second planarization layer, wherein the resin film covers a portion of the pixel electrode, and wherein a side surface of the resin film is rounded; and

a light emitting member formed on the pixel electrode;

wherein the electrode is in contact with a portion of an upper surface of the barrier layer in the contact hole.

10. A display device according to claim 9, wherein the barrier layer comprises silicon nitride.

11. A display device according to claim 9, wherein the first planarization layer comprises an inorganic insulating film formed by spin-coating.

12. A display device according to claim 9, wherein the first planarization layer comprises an inorganic insulating film leveled by polishing.

13. A display device according to claim 9, wherein the pixel electrode comprises an oxide conductive film.

14. A display device according to claim 9, wherein the pixel electrode comprises a metal film.

15. A display device according to claim 9, wherein the display device is incorporated in at least one selected from the group consisting of a television, a digital camera, a personal computer, a mobile computer, an image reproducing apparatus, a goggle-type display, a video camera, and a cellular phone.

16. A display device according to claim 9, wherein the light emitting member comprises an organic compound or an inorganic compound.