Digital controller for high-frequency switching power supplies

• US 7,595,686 B2
• Filed: 12/09/2002
• Issued: 09/29/2009
• Est. Priority Date: 11/09/2001
• Status: Active Grant

• Current Assignee: The Board of Regents of the University of Colorado (University of Colorado System)
• Original Assignee: The Board of Regents of the University of Colorado (University of Colorado System)
• Inventors: Patella, Benjamin James, Dhar, Sandeep Chaman, Maksimovic, Dragan, Prodic, Aleksandar
• Primary Examiner(s): Donovan; Lincoln
• Assistant Examiner(s): ENGLUND, TERRY LEE
• Application Number:
  US10/498,337
• Publication Number:
  US 20060055574A1
• Time in Patent Office: 2,486 Days
• Field of Search: None
• US Class Current: 327/540
• CPC Class Codes: G04F 10/005 Time-to-digital converters [TDC] analog-to-digital converters with intermediate conversion to time or phase H03M1/50, H03M1/60
• CPC Class Codes: H02M 3/157 with digital control
• CPC Class Codes: H03M 1/502 using tapped delay lines
• CPC Class Codes: H03M 1/60 with intermediate conversion to frequency of pulses

Abstract

A voltage controller (150), the controller comprising: a voltage comparator (700) operative to provide a digital error signal (152); a compensator (300) operative to determine a digital control signal (154) based on said provided error signal; and a modulator (400) operative to provide a power control signal (156) based on said determined digital control signal, wherein said comparator, said compensator, and said modulator are implemented entirely with digital logic gates.

Claims

1. A voltage controller comprising:

a compensator including a lookup table for determining a digital control signal based on a digital error signal;

a modulator operative to provide a power control signal in response to said determined digital control signal; and

a delay line analog to digital converter operative to compare a converter voltage to a reference voltage and generate said digital error signal indicative of a difference between said compared voltages;

wherein said compensator, said modulator, and said delay line of said controller include no passive electronic components.

2. The voltage controller of claim 1 wherein the delay line analog to digital converter comprises digital logic gate delay cells.

3. The voltage controller of claim 1 wherein said controller comprises no analog energy storage components.

4. The voltage controller of claim 1 wherein said controller includes no capacitors, inductors, or resistors.

5. A voltage controller comprising:

a compensator including a lookup table for determining a digital control signal based on a digital error signal;

a modulator operative to provide a power control signal in response to said determined digital control signal; and

a delay line analog to digital converter operative to compare a converter voltage to a reference voltage and generate said digital error signal indicative of a difference between said compared voltages;

wherein said controller is implemented entirely with digital logic gates.

6. The voltage controller of claim 5 wherein said digital logic gates correspond to standard library cells.

7. The voltage controller of claim 5 wherein said digital logic gates are hardware description language (HDL)-compatible.

8. The voltage controller of claim 5 wherein said controller comprises no analog energy storage components.

9. The voltage controller of claim 5 wherein said controller includes no capacitors, inductors, or resistors.

10. A voltage controller comprising:

a compensator including a lookup table for determining a digital control signal based on a digital error signal;

a modulator operative to provide a power control signal in response to said determined digital control signal; and

a delay line analog to digital converter operative to compare a converter voltage to a reference voltage and generate said digital error signal indicative of a difference between said compared voltages;

wherein all energy-storing components in said controller are digital logic gates.

11. A voltage controller comprising:

a compensator including a lookup table for determining a digital control signal based on a digital error signal;

a modulator operative to provide a power control signal in response to said determined digital control signal; and

a delay line analog to digital converter operative to compare a converter voltage to a reference voltage and generate said digital error signal indicative of a difference between said compared voltages;

wherein said delay line ADC comprises a delay cell array.

12. A voltage controller comprising:

a compensator including a lookup table for determining a digital control signal based on a thermometer code digital error signal;

a modulator operative to provide a power control signal in response to said determined digital control signal; and

a delay line analog to digital converter (ADC) operative to compare a converter voltage to a reference voltage and generate said thermometer code digital error signal indicative of a difference between said compared voltages.

13. The controller of claim 12 wherein an extent of test signal propagation through said delay line ADC establishes said thermometer code digital error signal.

14. The controller of claim 12 wherein said delay line ADC comprises an encoder operative to convert said thermometer code digital error signal into a binary digital error signal.

15. A voltage controller comprising:

a compensator including a lookup table for determining a digital control signal based on a digital error signal;

a modulator operative to provide a power control signal in response to said determined digital control signal; and

a delay line analog to digital converter operative to compare a converter voltage to a reference voltage and generate said digital error signal indicative of a difference between said compared voltages;

wherein said modulator comprises a delay line operative to determine a component of a pulse-on period for said power control signal.

16. A voltage controller comprising:

a compensator including a lookup table for determining a digital control signal based on a digital error signal;

a modulator operative to provide a power control signal in response to said determined digital control signal; and

a delay line analog to digital converter operative to compare a converter voltage to a reference voltage and generate said digital error signal indicative of a difference between said compared voltages;

wherein said modulator comprises;

a counter operative to determine a first component of a pulse-on period for said power control signal; and

a delay line operative to determine a second component of said pulse-on period for said power control signal.

17. A method for controlling voltage, the method comprising:

comparing a converter output voltage with a reference voltage;

generating a digital error signal indicative of a result of said comparing; and

providing a power control signal indicative of said generated error signal, wherein signal processing of said comparing, said generating, and said providing are performed entirely with digital logic gates.

18. The method of claim 17 wherein said comparing comprises powering a plurality of an array of delay cells with said converter output voltage.

19. The method of claim 17 wherein said comparing comprises measuring an extent of test signal propagation through an array of delay cells, said delay cells being powered by said converter output voltage.

20. The method of claim 17 wherein said providing comprises determining said power control signal from said generated error signal according to a control algorithm.

21. The method of claim 20 wherein said determining comprises selecting a lookup table entry based on a value of said generated error signal.

22. The method of claim 17 wherein said providing comprises determining a duty ratio from said generated error signal according to a control algorithm.

23. A method of controlling a regulator output voltage, the method comprising:

receiving said regulator output voltage;

converting said received regulator output voltage into a digital error signal employing a delay line analog to digital converter (ADC); and

adjusting said regulator output voltage to an adjusted regulator output voltage based on said digital error signal;

wherein said converting comprises;

powering a delay cell array of said delay line ADC with said received regulator output voltage;

measuring a speed of test signal propagation through said powered delay cell array; and

generating said digital error signal indicative of said measured test signal propagation speed.

24. The method of claim 23 wherein said converting further comprises calibrating said delay line ADC.

25. The method of claim 24 wherein said calibrating comprises:

converting a reference voltage into a reference conversion error value employing said delay line ADC; and

adding said reference conversion error value to said digital error signal, thereby providing a corrected digital error signal.

26. The method of claim 24 wherein said calibrating comprises:

powering said delay cell array for said calibrating with a reference voltage;

measuring a calibration speed of test signal propagation through said reference voltage-powered delay cell array;

generating a reference conversion error value indicative of said measured calibration test signal propagation speed; and

adding said reference conversion error value to said generated digital error signal.

27. The method of claim 23 wherein said adjusting comprises determining a digital control signal based on said generated digital error signal according to a control algorithm.