Method for packaging circuits and packaged circuits
First Claim
1. A method, comprising:
- providing a die;
providing a substrate having electrical signal terminals thereon;
fixing the die on the substrate;
forming electrical connections from die to the terminals; and
removing a backside of substrate to expose the terminals, wherein removing includes removing a portion of a semiconductor from the backside of the substrate.
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0 Petitions
Accused Products
Abstract
A method for packaging integrated circuit chips (die) is described that includes providing a base substrate with package level contacts, coating a base substrate with adhesive, placing dies on the adhesive, electrically connecting the die to the package level contacts, and removing the backside of the base substrate to expose the backside of the package level contacts. Accordingly, an essentially true chip scale package is formed. Multi-chip modules are formed by filling gaps between the chips with an encapsulant. In an embodiment, chips are interconnected by electrical connections between package level contacts in the base substrate. In an embodiment, substrates each having chips are adhered back-to-back with through vias formed in aligned saw streets to interconnect the back-to-back chip assembly.
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Citations
25 Claims
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1. A method, comprising:
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providing a die; providing a substrate having electrical signal terminals thereon; fixing the die on the substrate; forming electrical connections from die to the terminals; and removing a backside of substrate to expose the terminals, wherein removing includes removing a portion of a semiconductor from the backside of the substrate. - View Dependent Claims (2, 3, 4)
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5. A method, comprising:
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forming active devices on a first substrate; singulating the active devices; forming electrical terminals on a second semiconductor substrate; coating the second substrate with an adhesive; placing a plurality of active devices on the adhesive; curing the adhesive; electrically connecting the active devices to respective electrical terminals; removing a backside of the second substrate to expose a backside of the electrical terminals; and singulating the second substrate to form individual chip scale packages that include at least one active device and a portion of the second substrate. - View Dependent Claims (6, 7, 8, 9, 10, 11, 12, 13)
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14. A method, comprising:
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providing a semiconductor substrate having electrical signal terminals thereon; placing adhesive on a top surface of the substrate; placing a die having top surface bond pads on adhesive to fix the die to the substrate; forming electrical connections from top surface bond pads to the substrate terminals; and removing a backside of substrate to expose terminals, wherein removing includes removing a portion of a semiconductor from the backside of the substrate. - View Dependent Claims (15, 16, 17, 18)
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19. A method, comprising:
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fixing a plurality of dice on a semiconductor substrate over a plurality of package terminals such that adjacent die overlie common package terminals; electrically connecting I/O pads of the dice to the plurality of package terminals; removing a backside of the substrate to expose the plurality of package terminals; and singulating the plurality of dice with a portion of the substrate directly beneath each die to form a chip scale package. - View Dependent Claims (20)
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21. A method, comprising:
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providing a sensor die having a sensing device and an I/O pad at a top surface; providing a semiconductor substrate having electrical signal terminals thereon; fixing the die on the substrate; forming electrical connections from the I/O pad of the die to the substrate terminals; and removing a backside of substrate to expose the terminals. - View Dependent Claims (22, 23, 24, 25)
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Specification