System of fabricating a flexible electrode array

• US 7,810,233 B2
• Filed: 10/10/2006
• Issued: 10/12/2010
• Est. Priority Date: 11/16/2001
• Status: Active Grant

• Current Assignee: Doheny Eye Institute, Lawrence Livermore National Security LLC (Government of the United States of America)
• Original Assignee: Lawrence Livermore National Security LLC (Government of the United States of America)
• Inventors: Humayun, Mark S., Weiland, James D., Maghribi, Mariam N., Krulevitch, Peter, Polla, Dennis L., Hamilton, Julie
• Primary Examiner(s): Kim; Paul D
• Application Number:
  US11/545,190
• Publication Number:
  US 20070142878A1
• Time in Patent Office: 1,463 Days
• Field of Search: 295/921, 298/31, 298/32, 298/37, 298/42, 298/52, 298/54, 298/85, 257/133, 257/527, 607/36, 607/37, 607/53, 607/54, 607/116, 607/141, 607/142, 623/24, 623/25, 623/53, 623/900, 623/901, 623905-907, 623/926
• US Class Current: 29/832
• CPC Class Codes: A61N 1/0543 Retinal electrodes
• CPC Class Codes: H05K 1/118 specially for flexible printed circuits, e.g. using folded portions
• CPC Class Codes: H05K 2201/0162 Silicon containing polymer, e.g. silicone
• CPC Class Codes: H05K 2201/09481 Via in pad; Pad over filled via if used for surface mounting H05K1/113
• CPC Class Codes: H05K 2203/0733 Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
• CPC Class Codes: H05K 3/205 using a pattern electroplated or electroformed on a metallic carrier
• CPC Class Codes: H05K 3/4007 Surface contacts, e.g. bumps H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3457
• CPC Class Codes: Y10S 623/90 Stent for heart valve
• CPC Class Codes: Y10S 623/901 Method of manufacturing prosthetic device
• CPC Class Codes: Y10S 623/905 Eye
• CPC Class Codes: Y10S 623/926 Synthetic
• CPC Class Codes: Y10T 29/49128 Assembling formed circuit to base
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49139 by inserting component lead or terminal into base aperture
• CPC Class Codes: Y10T 29/49147 Assembling terminal to base
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base
• CPC Class Codes: Y10T 29/49169 Assembling electrical component directly to terminal or elongated conductor
• CPC Class Codes: Y10T 29/49224 with coating

Abstract

An image is captured or otherwise converted into a signal in an artificial vision system. The signal is transmitted to the retina utilizing an implant. The implant consists of a polymer substrate made of a compliant material such as poly(dimethylsiloxane) or PDMS. The polymer substrate is conformable to the shape of the retina. Electrodes and conductive leads are embedded in the polymer substrate. The conductive leads and the electrodes transmit the signal representing the image to the cells in the retina. The signal representing the image stimulates cells in the retina.

Claims

1. A system of fabricating a flexible electrode array, comprising the steps of:

spin-coating a poly(dimethylsiloxane) layer (PDMS) onto a handle wafer that has been pre-coated with a conductive seed layer;

patterning said poly(dimethylsiloxane) layer to expose said conductive seed layer to form electrodes;

plating a material for said electrodes until said electrodes are higher than a thickness of said poly(dimethylsiloxane) layer and until said electrodes form mushroom caps which later will prevent said electrodes from popping out of said poly(dimethylsiloxane) layer when said poly(dimethylsiloxane) layer is removed from said handle wafer; and

patterning conducing lines on said poly(dimethylsiloxane) layer.

2. The system of fabricating a flexible electrode array of claim 1, wherein said step of patterning conducing lines on said PDMS is conducted using thin film deposition.

3. The system of fabricating a flexible electrode array of claim 1, wherein said step of patterning conducing lines on said PDMS is conducted using photolithography.

4. The system of fabricating a flexible electrode array of claim 1, wherein said step of patterning conducing lines on said poly(dimethylsiloxane) layer is conducted using shadow masking.

5. The system of fabricating a flexible electrode array of claim 1, further comprising a step of directly embedding an electrical connector into said poly(dimethylsiloxane) layer to interface with electronics.

6. The system of fabricating a flexible electrode array of claim 1, further comprising a step of casting a PDMS capping layer to said PDMS.

7. The system of fabricating a flexible electrode array of claim 1, further comprising a step of bonding a poly(dimethylsiloxane) capping layer to said poly(dimethylsiloxane) layer.

8. The system of fabricating a flexible electrode array of claim 1, wherein said conductive seed layer is made of biocompatible.

9. The system of fabricating a flexible electrode array of claim 1, wherein said conductive seed layer is made of gold.

10. The system of fabricating a flexible electrode array of claim 1, wherein said conductive seed layer is made of platinum.

11. The system of fabricating a flexible electrode array of claim 1, wherein said conductive seed layer is made of a conductive polymer material.

12. The system of fabricating a flexible electrode array of claim 1, wherein in said step of plating a material for said electrodes until said electrodes are higher than the thickness of said poly(dimethylsiloxane) layer and until said electrodes form mushroom caps which later will prevent said electrodes from popping out of said poly(dimethylsiloxane) layer when said poly(dimethylsiloxane) layer is removed from said handle wafer and said electrodes are gold electrodes electroplated onto said conductive seed layer.

13. The system of fabricating a flexible electrode array of claim 1, wherein the material is made of platinum electroplated onto said conductive seed layer.

14. The system of fabricating a flexible electrode array of claim 1, further comprising a step of directly embedding an integrated circuit into said poly(dimethylsiloxane) layer such that said integrated circuit interfaces with the electrode array.