Noise checking method and apparatus, and computer-readable recording medium in which noise checking program is stored
First Claim
1. A noise checking method executed by a computer, in designing an integrated circuit, performed on a result of cell arrangement of a plurality of cells including a standard cell and a large cell on a chip of the integrated circuit or on a result of inter-cell wiring among the plurality of cells arranged on the chip, said method comprising:
- extracting, by a processor, terminal information about one or more terminals of the large cell and wiring forbidden information about one or more wiring forbidden areas each formed on or inside of the large cell from a library which provides the terminal information and the wiring forbidden information;
spuriously determining, by the processor, one or more internal wires of the large cell based on the terminal information and the wiring forbidden information extracted, and adding the internal wires determined into chip wires to be checked;
selecting, by the processor, an object wire to be checked and at least one affecting wire from the chip wires to which the internal wires determined are added;
calculating, by the processor, a noise value representing a degree at which the at least one affecting wire induces noise onto the object wire; and
carrying out, by the processor, a noise check on the object wire based on the noise value calculated.
1 Assignment
0 Petitions
Accused Products
Abstract
There is provided a technique in which internal wires of a large cell are spuriously patterned and treated as object of a noise check. Internal wires of a large cell are spuriously determined based on terminal information and wiring forbidden information of the large cell and are added to chip wires to be checked, from which an object wire to be checked and at least one affecting wire are selected, a noise value representing a degree at which the at least one affecting wire induces noise onto the signal of the object wire is calculated and the noise check is performed on the basis of the calculated noise check.
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Citations
19 Claims
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1. A noise checking method executed by a computer, in designing an integrated circuit, performed on a result of cell arrangement of a plurality of cells including a standard cell and a large cell on a chip of the integrated circuit or on a result of inter-cell wiring among the plurality of cells arranged on the chip, said method comprising:
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extracting, by a processor, terminal information about one or more terminals of the large cell and wiring forbidden information about one or more wiring forbidden areas each formed on or inside of the large cell from a library which provides the terminal information and the wiring forbidden information; spuriously determining, by the processor, one or more internal wires of the large cell based on the terminal information and the wiring forbidden information extracted, and adding the internal wires determined into chip wires to be checked; selecting, by the processor, an object wire to be checked and at least one affecting wire from the chip wires to which the internal wires determined are added; calculating, by the processor, a noise value representing a degree at which the at least one affecting wire induces noise onto the object wire; and carrying out, by the processor, a noise check on the object wire based on the noise value calculated. - View Dependent Claims (2, 3, 4)
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5. A noise checking method executed by a computer, in designing an integrated circuit, performed on a result of cell arrangement of a plurality of cells including a standard cell and a large cell on a chip of the integrated circuit or on a result of inter-cell wiring among the plurality of cells arranged on the chip, said method comprising:
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extracting, by a processor, terminal information about one or more terminals of the large cell, wiring forbidden information about one or more wiring forbidden areas each formed on or inside of the large cell, and at least one of maximum drivability and minimum drivability of each of one or more drivers used in the large cell from a library which provides the terminal information, the wiring forbidden information, and the maximum drivability and the minimum drivability of each of the drivers; spuriously determining, by the processor, one or more internal wires of the large cell based on the terminal information and the wiring forbidden information extracted, and adding the internal wires determined into chip wires to be checked; selecting, by the processor, an object wire to be checked and at least one affecting wire from the chip wires to which the internal wires determined are added; calculating, by the processor, a noise value representing a degree at which the at least one affecting wire induces noise onto the object wire on the basis of the at least one of the maximum drivability and the minimum drivability extracted; and carrying out, by the processor, a noise check on the object wire based on the noise value calculated. - View Dependent Claims (6, 7, 8, 9)
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10. A noise checking apparatus for performing, in designing an integrated circuit, a noise check on a result of cell arrangement of a plurality of cells including a standard cell and a large cell on a chip of the integrated circuit or on a result of inter-cell wiring among the plurality of cells arranged on the chip, said apparatus comprising:
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an extracting section extracting terminal information about one or more terminals of the large cell and wiring forbidden information about one or more wiring forbidden areas each formed on or inside of the large cell from a library which provides the terminal information and the wiring forbidden information; an internal wiring determining section spuriously determining one or more internal wires of the large cell based on the terminal information and the wiring forbidden information extracted by said extracting section, and adding the internal wires determined into chip wires to be checked; and a noise checking section selecting an object wire to be checked and at least one affecting wire from the chip wires to which the internal wires determined are added by said internal wiring determining section, calculating a noise value representing a degree at which the at least one affecting wire induces noise onto the object wire, and carrying out the noise check on the object wire based on the noise value calculated. - View Dependent Claims (11, 12, 13)
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14. A noise checking apparatus for performing, in designing an integrated circuit, a noise check on a result of cell arrangement of a plurality of cells including a standard cell and a large cell on a chip of the integrated circuit or on a result of inter-cell wiring among the plurality of cells arranged on the chip, said apparatus comprising:
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an extracting section extracting terminal information about one or more terminals of the large cell, wiring forbidden information about one or more wiring forbidden areas each formed on or inside of the large cell, and at least one of maximum drivability and minimum drivability of each of one or more drivers used in the large cell from a library which provides the terminal information, the wiring forbidden information, and the maximum drivability and the minimum drivability of each of the drivers; an internal wire determining section spuriously determining one or more internal wires of the large cell based on the terminal information and the wiring forbidden information extracted by said extracting section, and adding the internal wires determined into chip wires to be checked; and a noise checking section selecting an object wire to be checked and at least one affecting wire from the chip wires to which the internal wires determined are added by said internal wiring determining section, calculating a noise value representing a degree at which the at least one affecting wire induces noise onto the object wire on the basis of the at least one of the maximum drivability and the minimum drivability extracted by said extracting section, and carrying out the noise check on the object wire based on the noise value calculated.
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15. A non-transitory computer-readable recording medium in which a noise checking program to function a computer as a noise checking apparatus to perform, in designing an integrated circuit, a noise checking on a result of cell arrangement of a plurality of cells including a standard cell and a large cell on a chip of the integrated circuit chip or on a result of inter-cell wiring among the plurality of cells arranged on the chip is stored, wherein said program instructs the computer to function as:
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an extracting section extracting terminal information about one or more terminals of the large cell and wiring forbidden information about one or more wiring forbidden areas each formed on or inside of the large cell from a library which provides the terminal information and the wiring forbidden information; an internal wiring determining section spuriously determining one or more internal wires of the large cell based on the terminal information and the wiring forbidden information extracted by said extracting section, and adding the internal wires determined into chip wires to be checked; and a noise checking section selecting an object wire to be checked and at least one affecting wire from the chip wires to which the internal wires determined are added by said internal wiring determining section, calculating a noise value representing a degree at which the at least one affecting wire induces noise onto the object wire, and carrying out a noise check on the object wire based on the noise value calculated. - View Dependent Claims (16, 17, 18)
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19. A non-transitory computer-readable recording medium in which a noise checking program to function a computer as a noise checking apparatus to perform, in designing an integrated circuit, a noise checking on a result of cell arrangement of a plurality of cells including a standard cell and a large cell on a chip of the integrated circuit or on a result of inter-cell wiring among the plurality of cells arranged on the chip is stored, wherein said program instructs the computer to function as:
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an extracting section extracting terminal information about one or more terminals of the large cell, wiring forbidden information about one or more wiring forbidden areas each formed on or inside of the large cell, and at least one of maximum drivability and minimum drivability of each of one or more drivers used in the large cell from a library which provides the terminal information, the wiring forbidden information, and the maximum drivability and the minimum drivability of each of the drivers; an internal wire determining section spuriously determining one or more internal wires of the large cell based on the terminal information and the wiring forbidden information extracted by said extracting section, and adding the internal wires determined into chip wires to be checked; and a noise checking section selecting an object wire to be checked and at least one affecting wire from the chip wires to which the internal wires determined are added by said internal wiring determining section, calculating a noise value representing a degree at which the at least one affecting wire induces noise onto the object wire on the basis of the at least one of the maximum drivability and the minimum drivability extracted by said extracting section, and carrying out a noise check on the object wire based on the noise value calculated.
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Specification