Method for manufacturing electroconductive material-filled throughhole substrate

• US 7,918,020 B2
• Filed: 11/14/2005
• Issued: 04/05/2011
• Est. Priority Date: 11/24/2004
• Status: Active Grant

• Current Assignee: Dai Nippon Printing Company Limited
• Original Assignee: Dai Nippon Printing Company Limited
• Inventors: Chujo, Shigeki, Nakayama, Koichi
• Primary Examiner(s): Tugbang; A. Dexter
• Assistant Examiner(s): PARVEZ, AZM A
• Application Number:
  US11/791,593
• Publication Number:
  US 20080092378A1
• Time in Patent Office: 1,968 Days
• Field of Search: 298/52, 298/46, 298/31, 298/29, 298/74, 29/74, 205/125, 427/97.2, 427/97.8
• US Class Current: 29/852
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H05K 1/0306 Inorganic insulating substrates, e.g. ceramic, glass
• CPC Class Codes: H05K 2201/09563 Metal filled via plated through-hole filled with insulating material H05K2201/0959
• CPC Class Codes: H05K 2203/0733 Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
• CPC Class Codes: H05K 3/423 characterised by electroplating method
• CPC Class Codes: H05K 3/427 initial plating of through-holes in metal-clad substrates
• CPC Class Codes: Y10T 29/49124 On flat or curved insulated base, e.g., printed circuit, etc.
• CPC Class Codes: Y10T 29/49126 Assembling bases
• CPC Class Codes: Y10T 29/49128 Assembling formed circuit to base
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base
• CPC Class Codes: Y10T 29/49204 Contact or terminal manufacturing

Abstract

Disclosed is a method for manufacturing an electroconductive material-filled throughhole substrate that is free from any void part in the electroconductive material filled into the throughholes. The method comprises forming an electroconductive base layer on one side of a core substrate having throughholes, and precipitating and growing an electroconductive material from one direction within the throughholes by electroplating using the electroconductive base layer as a seed layer to fill the electroconductive material into the throughholes without forming any void part and thus to manufacture an electroconductive material-filled throughhole substrate.

Claims

1. A method for manufacturing an electroconductive material-filled throughhole substrate of which the front side and back side have been electrically conducted to each other through an electroconductive material filled into the throughholes comprising the steps of:

forming an electroconductive base layer on one side of a core substrate having throughholes, wherein the electroconductive base layer has an opening corresponding to the throughholes; and

filling the throughholes with an electroconductive material by electroplating using the electroconductive base layer as a seed layer;

wherein the electroconductive material is precipitated on the electroconductive base layer and further, the electroconductive material is precipitated in the openings to clog the openings at a clog site, and then the electroconductive material is precipitated and grown from the clog site toward the inside of the throughholes to fill the electroconductive material into the throughholes.

2. The method according to claim 1, characterized in that the core substrate having the throughholes is formed by subjecting the core substrate to dry etching utilizing plasma to form throughholes having an opening diameter in the range of 10 to 100 μ

m.

3. The method according to claim 1, characterized in that the core substrate having the throughholes is formed by subjecting the core substrate to dry etching utilizing plasma from one side of the core substrate to form pores having an opening diameter in the range of 10 to 100 μ

m to a predetermined depth and then polishing the other side of the core substrate to expose the pores on the other side of the core substrate and thus to form throughholes.

4. The method according to claim 1, characterized in that the electroconductive base layer is formed by either vapor deposition or sputtering.

5. The method according to claim 1, characterized in that the throughholes are formed so as to have an opening diameter in the range of 10 to 70 μ

m.

6. The method according to claim 1, characterized in that the core substrate is a silicon substrate.

7. The method according to claim 1, characterized in that the electroconductive material is copper.