High-density nonvolatile memory
First Claim
1. A monolithic three dimensional memory array comprising:
- a plurality of substantially parallel first conductors above a substrate, the first conductors not comprising monocrystalline silicon;
a plurality of first semiconductor elements above the first conductors, each first semiconductor element comprising a first heavily doped layer of a first conductivity type, a second lightly doped layer, and a third heavily doped layer of a second conductivity type;
a plurality of first antifuse layers, each first antifuse layer formed above one of the plurality of first semiconductor elements; and
a plurality of substantially parallel second conductors, the second conductors above the plurality of first antifuse layers.
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Accused Products
Abstract
Nonvolatile memory cells and methods of forming the same are provided, the methods including forming a first conductor at a first height above a substrate; forming a first pillar-shaped semiconductor element above the first conductor, wherein the first pillar-shaped semiconductor element comprises a first heavily doped layer of a first conductivity type, a second lightly doped layer above and in contact with the first heavily doped layer, and a third heavily doped layer of a second conductivity type above and in contact with the second lightly doped layer, the second conductivity type opposite the first conductivity type; forming a first dielectric antifuse above the third heavily doped layer of the first pillar-shaped semiconductor element; and forming a second conductor above the first dielectric antifuse.
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Citations
16 Claims
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1. A monolithic three dimensional memory array comprising:
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a plurality of substantially parallel first conductors above a substrate, the first conductors not comprising monocrystalline silicon; a plurality of first semiconductor elements above the first conductors, each first semiconductor element comprising a first heavily doped layer of a first conductivity type, a second lightly doped layer, and a third heavily doped layer of a second conductivity type; a plurality of first antifuse layers, each first antifuse layer formed above one of the plurality of first semiconductor elements; and a plurality of substantially parallel second conductors, the second conductors above the plurality of first antifuse layers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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Specification