Method for assigning physical data address range in multiprocessor system
First Claim
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1. A method comprising:
- initializing a cache-as-RAM (CAR) system in a multi-processor system, the multi-processor system including a plurality of processors, each processor associated with a memory;
the CAR system assigning a physical data address range for each of the plurality of processors, such that the physical data address ranges allocated to the plurality of processors overlap with each other, wherein a plurality of first parts of the physical data address ranges assigned to the plurality of processors overlap completely with each other; and
executing a boot code stream with the CAR system appearing to the executing boot stream as a memory store for executing the boot code stream.
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Abstract
A cache-as-RAM (CAR) system of a multi-processor system that includes a plurality of processors may be initialized. The CAR system may assign a physical data address range for each of the plurality of processors such that the physical data address ranges allocated to all of the plurality of processors overlap with each other. A boot code stream may be executed with the CAR appearing to the executing boot stream as a memory store for executing the boot code stream. Other embodiments are described and claimed.
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Citations
22 Claims
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1. A method comprising:
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initializing a cache-as-RAM (CAR) system in a multi-processor system, the multi-processor system including a plurality of processors, each processor associated with a memory; the CAR system assigning a physical data address range for each of the plurality of processors, such that the physical data address ranges allocated to the plurality of processors overlap with each other, wherein a plurality of first parts of the physical data address ranges assigned to the plurality of processors overlap completely with each other; and executing a boot code stream with the CAR system appearing to the executing boot stream as a memory store for executing the boot code stream. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A device comprising:
a plurality of processors each associated with a portion of memory, one or more of the plurality of processors to initialize a cache-as-RAM (CAR) system, the CAR system to assign a tile for each of the plurality of processors such that the tiles allocated to the plurality of processors overlap with each other, wherein a plurality of first parts of the tiles allocated to the plurality of processors overlap completely with each other, and to execute a boot code stream with the CAR system appearing to the executing boot stream as a memory store for executing the boot code stream. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A system comprising:
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a plurality of processors each associated with a memory, one or more of the plurality of processors to initialize a cache-as-RAM (CAR) system, the CAR system to assign a physical data address range for each of the plurality of processors such that the physical data address ranges allocated to the plurality of processors overlap with each other, wherein a first part of the physical address ranges allocated to the plurality of processors overlap completely with each other, and to execute a boot code stream with the CAR system accessed by the executing boot stream as a memory store for executing the boot code stream; and an interconnect network to connect the plurality of processors. - View Dependent Claims (14, 15, 16, 17, 18)
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19. A tangible processor-readable storage medium having stored thereon instructions that, when executed by a machine, cause the machine to at least:
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initialize a cache-as-RAM (CAR) system in a multi-processor system, the multi-processor system including a plurality of processors, each processor associated with a memory; assign a tile for each of the plurality of processors, such that the tiles allocated to the plurality of processors overlap with each other, wherein a plurality of first parts of the tiles allocated to the plurality of processors overlap completely with each other; and access, via a boot code stream, the CAR system as a memory store for execution. - View Dependent Claims (20, 21, 22)
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Specification