Integrated physiologic monitoring systems and methods

• US 8,200,320 B2
• Filed: 03/03/2006
• Issued: 06/12/2012
• Est. Priority Date: 03/03/2006
• Status: Active Grant

• Current Assignee: Physiowave, Inc. (Omron Corporation)
• Original Assignee: Physiowave, Inc. (Omron Corporation)
• Inventors: Kovacs, Gregory T.A.
• Primary Examiner(s): Bertram, Eric D.
• Application Number:
  US11/367,992
• Publication Number:
  US 20070208233A1
• Time in Patent Office: 2,293 Days
• Field of Search: 600/508, 600/509, 600/513
• US Class Current: 600/513
• CPC Class Codes: A61B 2560/0412 Low-profile patch shaped housings
• CPC Class Codes: A61B 2562/0219 Inertial sensors, e.g. accelerometers, gyroscopes, tilt switches
• CPC Class Codes: A61B 5/0205 Simultaneously evaluating both cardiovascular conditions and different types of body conditions, e.g. heart and respiratory condition
• CPC Class Codes: A61B 5/0809 by impedance pneumography
• CPC Class Codes: A61B 5/1118 Determining activity level
• CPC Class Codes: A61B 5/14551 for measuring blood gases
• CPC Class Codes: A61B 5/335 using integrated circuit memory devices
• CPC Class Codes: A61B 5/4866 Evaluating metabolism A61B5/083 takes precedence
• CPC Class Codes: A61B 5/6831 Straps, bands or harnesses

Abstract

In some embodiments, a wearable physiologic monitor comprises a mixed analog and digital application-specific integrated circuit (ASIC) including signal conditioning circuitry, an A/D converter, a real-time clock, and digital control logic. The signal conditioning circuitry includes analog amplification circuitry, analog (continuous-time or switched capacitor) filtering circuitry before the A/D converter, and in some embodiments digital (DSP) filtering circuitry after the A/D converter. The monitor includes sensors such as electrocardiogram (ECG) electrodes, accelerometers, and a temperature sensor, some of which may be integrated on the ASIC. The digital control logic receives digital physiologic data sampled at different rates, assembles the data into physiologic data packets, time-stamps at least some of the packets, and periodically stores the packets in a digital memory. The monitor may include a disposable patch including the ASIC, and a reusable, removable digital memory such as flash memory card. Applications include ambulatory monitoring and quantitative titration of care.

Claims

1. A physiologic monitoring system including a physiologic monitoring application-specific integrated circuit, the integrated circuit comprising:

amplification and filtering circuitry integrated on a semiconductor substrate, for amplifying and filtering a set of electrical signals received from a first set of physiologic sensors to generate a first set of filtered electrical signals, the amplification and filtering circuitry comprising analog filtering circuitry for filtering the set of electrical signals received from the first set of physiologic sensors, wherein the first set of physiologic sensors is a set of electrocardiogram sensors, and wherein the set of electrical signals received from the first set of physiologic sensors is a set of electrocardiogram electrical signals;

a real-time clock integrated on the semiconductor substrate, the real-time clock comprising a divider chain configured to frequency-divide a base timing signal to generate a real-time clock tick, wherein a frequency of signals generated by the real-time clock is within a frequency range of electrocardiogram electrical signals processed by the amplification and filtering circuitry; and

digital control logic integrated on the semiconductor substrate and connected to the real-time clock and the amplification and filtering circuitry;

the digital control logic being configured to

receive a first set of digital physiologic data derived from the first set of filtered electrical signals,

receive a second set of digital physiologic data, wherein the second set of physiologic data includes physiologic data sampled with a different sampling rate than the first set of digital physiologic data,

generate a time-stamped physiologic data packet from a real-time indicator, the first set of digital physiologic data and the second set of digital physiologic data, wherein the real-time indicator is generated according to the real-time clock tick; and

transmit the physiologic data packet for storage in a digital memory.

2. The system of claim 1, wherein the integrated circuit further comprises mode-selection logic integrated on the semiconductor substrate and connected to the digital control logic, for setting an operating mode of the integrated circuit to a mode selected from a stand-alone mode and a peripheral mode.

3. The system of claim 2, wherein the integrated circuit further comprises a set of integrated circuit mode-selection input pins connected to the mode-selection logic, wherein the mode-selection logic is configured to set the operating mode of the integrated circuit according to a set of logic levels of the mode-selection input pins.

4. The system of claim 3, wherein the mode-selection input pins are bonded to a set of mode-selection logic levels.

5. The system of claim 1, wherein the integrated circuit is integrated in a wearable patch configured to be attached to a subject'"'"'s skin.

6. The system of claim 5, wherein the first set of physiologic sensors is integrated in the wearable patch.

7. The system of claim 5, wherein the patch comprises an encapsulant enclosing the integrated circuit.

8. The system of claim 5, further comprising an adhesive for coupling the patch to a subject'"'"'s skin.

9. The system of claim 1, further comprising a physiologic temperature sensor thermally coupled to the subject and connected to the digital control logic, for generating a set of subject temperature indicators, wherein the second set of digital data comprises subject temperature data derived from the subject temperature indicators.

10. The system of claim 1, further comprising an accelerometer connected to the digital control logic, for generating a set of acceleration indicators, wherein the second set of digital data comprises acceleration data derived from the acceleration indicators.

11. The system of claim 10, wherein the integrated circuit comprises the accelerometer, the accelerometer being integrated on the semiconductor substrate.

12. The system of claim 1, wherein the integrated circuit further comprises an impedance measurement circuit coupled to the subject and connected to the digital control logic, for generating a set of impedance indicators, wherein the second set of digital data comprises subject impedance data derived from the impedance indicators, the impedance measurement circuit being integrated on the semiconductor substrate.

13. The system of claim 1, further comprising a pulse oximeter for generating a set of blood oxygen indicators, wherein the second set of digital data comprises blood oxygen data derived from the blood oxygen indicators.

14. The system of claim 1, further comprising a light detector for generating a set of ambient light intensity indicators, wherein the second set of digital data comprises ambient light intensity data derived from the ambient light intensity indicators.

15. The system of claim 1, further comprising a sound detector for generating a set of ambient sound intensity indicators, wherein the second set of digital data comprises ambient sound intensity data derived from the ambient sound intensity indicators.

16. The system of claim 1, further comprising an ionizing radiation detector for generating a set of ambient ionizing radiation indicators, wherein the second set of digital data comprises ambient ionizing radiation data derived from the ambient ionizing radiation indicators.

17. The system of claim 1, wherein the amplification and filtering circuitry comprises a pacemaker pulse detection circuit for detecting a set of pacemaker pulses sensed by the electrocardiogram electrodes.

18. The system of claim 1, wherein the amplification and filtering circuitry comprises continuous-time analog filtering circuitry.

19. The system of claim 1, wherein the amplification and filtering circuitry comprises switched capacitor filtering circuitry.

20. The system of claim 1, wherein the amplification and filtering circuitry comprises a digital signal processor.

21. The system of claim 1, further comprising a timing resonator coupled to the real-time clock, for generating the base timing signal.

22. The system of claim 21, wherein the timing resonator is integrated on the semiconductor substrate.

23. The system of claim 1, further comprising a subject sensory indicator device connected to the digital control logic, for providing a sensory indication to a subject.

24. The system of claim 23, wherein the sensory indicator device comprises a light-emitting device.

25. The system of claim 23, wherein the sensory indicator device comprises a speaker.

26. The system of claim 25, wherein the sensory indication comprises a voice prompt.

27. The system of claim 1, wherein the digital control logic comprises physiologic condition detection logic configured to activate a sensory indicator device when a physiologic parameter value meets a predetermined condition.

28. The system of claim 1, wherein the digital control logic comprises real-time detection logic configured to activate a sensory indicator device when a real time indicator meets a predetermined condition.

29. The system of claim 1, wherein the digital control logic comprises electrode fault detection logic for detecting an electrocardiogram electrode fault.

30. The system of claim 1, wherein the digital control logic is configured to include an external user-actuation signal in the time-stamped data packet.

31. The system of claim 1, further comprising a wearable visual display connected to the digital control logic, for generating a display of data derived from the physiologic data packet.

32. The system of claim 1, wherein the digital control logic is configured to generate a set of time-stamped data packets including a first time-stamped physiologic data packet, a second time-stamped physiologic data packet, and a set of non-time-stamped physiologic data packets, wherein the first time-stamped data packet and the second time-stamped data packet are temporally separated by the set of non-time-stamped physiologic data packets.

33. The system of claim 1, wherein the digital control logic is configured to assemble a set of physiologic data packets according to a predetermined inter-packet time period, wherein each packet in the set of physiologic data packets is separated by the inter-packet time period from an immediately preceding data packet and an immediately subsequent data packet.

34. The system of claim 1, wherein a signal shape of the real-time clock tick has softened edges.

35. The system of claim 1, wherein a frequency of the real-time clock tick is on the order of Hz.

36. The system of claim 1, wherein the real-time clock and the amplification and filtering circuitry are situated along opposite sides of the semiconductor substrate, so as to separate the real-time clock from the amplification and filtering circuitry along a surface of the semiconductor substrate.

37. The system of claim 1, further comprising a decoupling off-chip capacitor connected to the integrated circuit, for isolating the real-time clock from the amplification and filtering circuitry.

38. A wearable physiologic monitoring system comprising:

a battery;

a plurality of electrocardiogram electrodes to be applied to a subject;

a removable digital memory; and

an application-specific integrated circuit connected to the removable digital memory, the battery, and the plurality of electrocardiogram electrodes, the integrated circuit comprising;

amplification and filtering circuitry integrated on a semiconductor substrate and connected to the plurality of electrocardiogram electrodes, for amplifying and filtering a set of electrical signals received from the electrocardiogram electrodes to generate a set of filtered electrocardiogram data, the amplification and filtering circuitry comprising analog filtering circuitry for filtering the set of electrical signals received from the electrocardiogram electrodes;

a real-time clock integrated on the semiconductor substrate, the real-time clock comprising a divider chain configured to frequency-divide a base timing signal to generate a real-time clock tick, wherein a frequency of signals generated by the real-time clock is within a frequency range of electrocardiogram electrical signals processed by the amplification and filtering circuitry; and

digital control logic integrated on the semiconductor substrate and connected to the real-time clock and the amplification and filtering circuitry, the digital control logic being configured to

assemble a time-stamped data packet including a set of digital electrocardiogram data derived from the filtered electrocardiogram data, the data packet being time-stamped according to a real-time indicator generated according to the real-time clock tick, and

transmit the data packet for storage in the removable digital memory.

39. The system of claim 38, wherein the digital control logic is further configured to assemble the data packet to include a set of digital non-electrocardiogram physiologic data.

40. The system of claim 38, wherein the integrated circuit, battery, and removable digital memory are integrated in a wearable patch configured to be attached to a subject'"'"'s skin.

41. The system of claim 40, wherein the plurality of electrodes are integrated in the wearable patch.

42. The system of claim 40, wherein the patch comprises an encapsulant enclosing the integrated circuit.

43. The system of claim 40, further comprising an adhesive for coupling the patch to a subject'"'"'s skin.

44. The system of claim 38, wherein the amplification and filtering circuitry comprises a pacemaker pulse detection circuit for detecting a set of pacemaker pulses sensed by the electrocardiogram electrodes.

45. The system of claim 38, wherein the amplification and filtering circuitry comprises continuous-time analog filtering circuitry.

46. The system of claim 38, wherein the amplification and filtering circuitry comprises switched capacitor filtering circuitry.

47. The system of claim 38, wherein the amplification and filtering circuitry comprises a digital signal processor.

48. The system of claim 38, further comprising a timing resonator coupled to the real-time clock, for generating the base timing signal.

49. The system of claim 48, wherein the timing resonator is integrated on the semiconductor substrate.

50. The system of claim 38, further comprising a physiologic temperature sensor for generating a set of subject temperature indicators, the digital control logic being connected to the temperature sensor and configured to include in the time-stamped data packet a set of digital temperature data derived from the set of subject temperature indicators.

51. The system of claim 38, further comprising an accelerometer for generating a set of subject acceleration indicators, wherein the digital control logic is configured to include in the time-stamped data packet a set of digital acceleration data derived from the acceleration indicators.

52. The system of claim 51, wherein the integrated circuit comprises the accelerometer, the accelerator being integrated on the semiconductor substrate.

53. The system of claim 38, further comprising an impedance measurement circuit comprising an impedance measurement electrode, for generating a set of impedance indicators, wherein the digital control logic is configured to include in the time-stamped data packet a set of digital impedance data derived from the impedance indicators.

54. The system of claim 38, further comprising a pulse oximeter for generating a set of blood oxygen indicators, wherein the digital control logic is configured to include in the time-stamped data packet a set of digital blood oxygen data derived from the blood oxygen indicators.

55. The system of claim 38, further comprising a light detector for generating a set of ambient light intensity indicators, wherein the digital control logic is configured to include in the time-stamped data packet a set of digital ambient light data derived from the ambient light intensity indicators.

56. The system of claim 38, further comprising a sound detector for generating a set of ambient sound intensity indicators, wherein the digital control logic is configured to include in the time-stamped data packet a set of digital ambient sound data derived from the ambient sound intensity indicators.

57. The system of claim 38, further comprising an ionizing radiation detector for generating a set of ambient ionizing radiation indicators, wherein the digital control logic is configured to include in the time-stamped data packet a set of digital ionizing radiation data derived from the ambient ionizing radiation indicators.

58. The system of claim 38, further comprising a subject sensory indicator device connected to the digital control logic, for providing a sensory indication to a subject.

59. The system of claim 58, wherein the sensory indication comprises a voice prompt.

60. The system of claim 58, wherein the digital control logic comprises physiologic condition detection logic connected to the sensory indicator device and configured to activate the sensory indicator device when a physiologic parameter value meets a predetermined condition.

61. The system of claim 58, wherein the digital control logic comprises real-time detection logic connected to the sensory indicator device and configured to activate a sensory indicator device when a real time indicator meets a predetermined condition.

62. The system of claim 38, wherein the digital control logic comprises electrode fault detection logic connected to the plurality of electrocardiogram electrodes, for detecting an electrocardiogram electrode fault.

63. The system of claim 38, further comprising an external event actuator configured to generate an event signal in response to actuation by a subject, the digital control logic being configured to include digital event data derived from the event signal in the time-stamped data packet.

64. The system of claim 38, further comprising a wearable visual display connected to the digital control logic, for generating a display of data derived from the digital electrocardiogram data.

65. A wearable physiologic monitoring system comprising:

a battery;

a plurality of electrocardiogram electrodes to be applied to a subject;

a digital memory; and

an application-specific integrated circuit connected to the digital memory, the battery, and the plurality of electrocardiogram electrodes, the integrated circuit comprising;

amplification and filtering circuitry integrated on a semiconductor substrate and connected to the plurality of electrocardiogram electrodes, for amplifying and filtering a set of electrical signals received from the electrocardiogram electrodes to generate a set of filtered electrocardiogram data, the amplification and filtering circuitry comprising analog filtering circuitry for filtering the set of electrical signals received from the electrocardiogram electrodes;

a real-time clock integrated on the semiconductor substrate, the real-time clock comprising a divider chain configured to frequency-divide a base timing signal to generate a real-time clock tick, wherein a frequency of signals generated by the real-time clock is within a frequency range of electrocardiogram electrical signals processed by the amplification and filtering circuitry; and

digital control logic integrated on the semiconductor substrate and connected to the real-time clock and the amplification and filtering circuitry, the digital control logic being configured to

time-stamp a set of digital electrocardiogram data derived from the filtered electrocardiogram data according to a real-time indicator generated according to the real-time clock tick, and

transmit a set of time-stamped digital electrocardiogram data for storage in the digital memory.

66. A physiologic monitoring system comprising:

electrocardiogram sensing means for sensing a set of electrocardiogram signals generated along a subject'"'"'s skin;

wearable means connected to the electrocardiogram sending means and comprising;

digital memory means; and

an application-specific integrated circuit comprising

signal conditioning means integrated on a semiconductor substrate, for amplifying and filtering a set of electrical signals received from the electrocardiogram sensing means;

real-time means integrated on the semiconductor substrate, the real-time means comprising a divider chain configured to frequency-divide a base timing signal to generate a real-time clock tick, wherein a frequency of signals generated by the real-time means is within a frequency range of electrocardiogram electrical signals processed by the signal conditioning means; and

digital control logic integrated on the semiconductor substrate and connected to the signal conditioning means, for time-stamping according to a set of real-time indicators a set of digital electrocardiogram data derived from the electrical signals, and transmitting a set of time-stamped digital electrocardiogram data to the digital memory means for storage, wherein the real-time indicators are generated according to the real-time clock tick.

67. A wearable physiologic monitoring system comprising:

a digital memory;

a wearable patch comprising an integrated circuit connected to a plurality of electrocardiogram electrodes and the digital memory, the integrated circuit comprising;

a temperature sensor integrated on a semiconductor substrate, for generating a set of subject temperature indicators;

an accelerometer integrated on the semiconductor substrate, for generating a set of subject acceleration indicators;

amplification and filtering circuitry integrated on the semiconductor substrate and connected to the plurality of electrocardiogram electrodes, for amplifying and filtering a set of electrical signals received from the electrocardiogram electrodes, the amplification and filtering circuitry comprising analog filtering circuitry for filtering the set of electrical signals received from the electrocardiogram electrodes;

a real-time clock integrated on the semiconductor substrate, the real-time clock comprising a divider chain configured to frequency-divide a base timing signal to generate a real-time clock tick, wherein a frequency of signals generated by the real-time clock is within a frequency range of electrocardiogram electrical signals processed by the amplification and filtering circuitry; and

digital control logic connected to the amplification and filtering circuitry, the temperature sensor and the accelerometer, the digital control logic being configured to

assemble a physiologic data packet including digital electrocardiogram data derived from the set of electrical signals, temperature data derived from the set of subject temperature indicators, and acceleration data derived from the subject acceleration indicators,

time-stamp the data packet according to a real-time indicator generated according to the real-time clock tick, and

transmit the data packet to the digital memory for storage.

68. A physiologic monitoring method comprising:

sensing a first set of physiologic indicators generated by a subject using a first sensor set, wherein the first sensor set is a set of electrocardiogram sensors, and wherein sensing the first set of physiologic indicators comprises sensing a set of electrocardiogram electrical signals; and

employing a mixed analog and digital application-specific integrated circuit comprising signal conditioning circuitry, a real-time clock and digital control logic integrated on a semiconductor substrate to

amplify and filter the first set of physiologic indicators,

employ a divider chain of the real-time clock to frequency-divide a base timing signal to generate a real-time clock tick, wherein a frequency of signals generated by the real-time clock is within a frequency range of electrocardiogram electrical signals processed by circuitry of the integrated circuit used to amplify and filter and first set of physiologic indicators,

generate a first set of digital physiologic data from the first set of physiologic indicators at a first sampling rate,

assemble the first set of digital physiologic data into a data packet,

time-stamp the data packet according to a real-time indicator generated according to the real-time clock tick, and

transmit the data packet for storage in a removable digital memory connected to the integrated circuit.

69. The method of claim 68, further comprising:

sensing a second set of physiologic indicators generated by the subject using a second sensor set; and

employing the integrated circuit to generate a second set of digital physiologic data from the second set of physiologic indicators at a second sampling rate different from the first sampling rate.

70. The method of claim 68, further comprising:

performing a first quantitative evaluation of an effect on the subject of a first course of therapy according to the first set of digital physiologic data;

selecting a second course of therapy for the subject according to the first quantitative evaluation; and

performing a second quantitative evaluation of an effect of the second course of therapy on the subject.

71. The method of claim 70, wherein the first course of therapy comprises administering a first medication dose to the subject, and the second course of therapy comprises administering a second medication dose to the subject.

72. The method of claim 68, wherein a signal shape of the real-time clock tick has softened edges.

73. The method of claim 68, wherein a frequency of the real-time clock tick is on the order of Hz.

74. The method of claim 68, wherein the real-time clock and the amplification and filtering circuitry are situated along opposite sides of the semiconductor substrate, so as to separate the real-time clock from the amplification and filtering circuitry along a surface of the semiconductor substrate.

75. The method of claim 68, further comprising isolating the real-time clock from the amplification and filtering circuitry using a decoupling off-chip capacitor connected to the integrated circuit.