Dual bit line metal layers for non-volatile memory
First Claim
Patent Images
1. A non-volatile storage device, comprising:
- a plurality of non-volatile storage elements formed in an array on a semiconductor substrate;
a plurality of parallel structures formed in at least two separate metal layers over the semiconductor substrate, wherein every other parallel structure in each metal layer defines a bit line and remaining parallel structures in each metal layer define shields and contact blocks such that each of the shields in each metal layer is formed in segments between the contact blocks along each alternating column of a plurality of columns of the array, wherein the bit lines and shields are formed to alternate between the metal layers, each of the bit lines being formed to have an alternating series of wider portions and narrower portions; and
a plurality of connections coupling the narrower portions of the bit lines and the storage elements.
3 Assignments
0 Petitions
Accused Products
Abstract
Structures and techniques are disclosed for reducing bit line to bit line capacitance in a non-volatile storage system. The bit lines are formed at a 4ƒpitch in each of two separate metal layers, and arranged to alternate between each of the layers. In an alternative embodiment, shields are formed between each of the bit lines on each metal layer.
-
Citations
17 Claims
-
1. A non-volatile storage device, comprising:
-
a plurality of non-volatile storage elements formed in an array on a semiconductor substrate; a plurality of parallel structures formed in at least two separate metal layers over the semiconductor substrate, wherein every other parallel structure in each metal layer defines a bit line and remaining parallel structures in each metal layer define shields and contact blocks such that each of the shields in each metal layer is formed in segments between the contact blocks along each alternating column of a plurality of columns of the array, wherein the bit lines and shields are formed to alternate between the metal layers, each of the bit lines being formed to have an alternating series of wider portions and narrower portions; and a plurality of connections coupling the narrower portions of the bit lines and the storage elements. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A non-volatile storage device, comprising:
-
a plurality of non-volatile storage elements formed in an array on a semiconductor substrate; a first plurality of structures formed in parallel in a first metal layer over the array, wherein every other parallel structure in the first metal layer defines a bit line and remaining parallel structures in the first metal layer define shields and contact blocks such that each of the shields in the first metal layer is formed in segments between the contact blocks along each alternating column of a plurality of columns of the array; and a second plurality of structures formed in parallel in a second metal layer over the first metal layer, wherein every other parallel structure in the second metal layer defines a bit line and remaining parallel structures in the second metal layer define shields and contact blocks such that each of the shields in the second metal layer is formed in segments between the contact blocks along each alternating column of the plurality of columns of the array; and a plurality of connections coupling the bit lines to corresponding storage elements of the plurality of non-volatile storage elements, wherein the bit lines are formed to alternate between the first and second metal layers relative to the storage elements, and wherein each of the bit lines is formed to have a width that is narrower proximate to the connections and wider between the connections. - View Dependent Claims (10, 11, 12)
-
-
13. A non-volatile storage system, comprising:
-
a plurality of non-volatile storage elements formed in an array on a semiconductor substrate, said array being organized into rows and columns; a plurality of bit lines formed in a first metal layer over the array in correspondence with a first set of columns comprising every other column; a plurality of shields and contact blocks formed in the first metal layer over the array in correspondence with a second set of columns comprising every other column not in the first set of columns such that each of the shields in the first metal layer is formed in segments between the contact blocks along the second set of columns of the array; a plurality of bit lines formed in a second metal layer over the first metal layer in correspondence with the second set of columns comprising every other column not in the first set of columns; a plurality of shields and contact blocks formed in the second metal layer over the first metal layer in correspondence with the first set of columns such that each of the shields in the second metal layer is formed in segments between the contact blocks along the first set of columns of the array; and a plurality of connections coupling the bit lines and the storage elements such that adjacent columns are coupled to bit lines in different metal layers, wherein each of the bit lines is continuous and tapers in to become narrower at the connections and tapers out to become wider between the connections. - View Dependent Claims (14, 15, 16, 17)
-
Specification