Method of manufacture and structure for a trench transistor having a heavy body region
First Claim
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1. A method of manufacturing a trench transistor comprising:
- forming a first trench;
forming a second trench, the first trench and the second trench defining a semiconductor mesa therebetween, a height of the semiconductor mesa defining a depth of the first trench and a depth of the second trench, the semiconductor mesa being of a first conductivity type;
lining the first trench and the second trench with a gate dielectric material;
substantially filling the gate dielectric-lined first trench and the gate dielectric-lined second trench with a conductive material, the conductive material forming a gate electrode of the trench transistor;
forming a doped well in the semiconductor mesa, the doped well having a depth that is less than the depth of the first trench and less than the depth of the second trench, the doped well being of a second conductivity type that is opposite the first conductivity type;
forming a source region within the doped well, the source region having a depth that is less than the depth of the doped well, the source region being of the first conductivity type; and
forming a heavy body structure within the doped well, the heavy body structure including a region of the second conductivity type, a dopant of the second conductivity type in the region of the second conductivity type having a peak concentration at a peak concentration depth, the peak concentration depth being greater than the depth of the source region and less than the depth of the doped well.
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Abstract
A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the opposite side of the source junction from the trench, the deepest portion of the heavy body extending less deeply into said semiconductor substrate than the predetermined depth of the trench, and (e) a doped well surrounding the heavy body beneath the heavy body.
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Citations
22 Claims
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1. A method of manufacturing a trench transistor comprising:
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forming a first trench; forming a second trench, the first trench and the second trench defining a semiconductor mesa therebetween, a height of the semiconductor mesa defining a depth of the first trench and a depth of the second trench, the semiconductor mesa being of a first conductivity type; lining the first trench and the second trench with a gate dielectric material; substantially filling the gate dielectric-lined first trench and the gate dielectric-lined second trench with a conductive material, the conductive material forming a gate electrode of the trench transistor; forming a doped well in the semiconductor mesa, the doped well having a depth that is less than the depth of the first trench and less than the depth of the second trench, the doped well being of a second conductivity type that is opposite the first conductivity type; forming a source region within the doped well, the source region having a depth that is less than the depth of the doped well, the source region being of the first conductivity type; and forming a heavy body structure within the doped well, the heavy body structure including a region of the second conductivity type, a dopant of the second conductivity type in the region of the second conductivity type having a peak concentration at a peak concentration depth, the peak concentration depth being greater than the depth of the source region and less than the depth of the doped well. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 12, 13)
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9. The method of claim l, wherein the forming the heavy body structure includes diffusing the dopant of the second conductivity type.
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10. The method of claim l, wherein the forming the heavy body structure includes implanting the dopant of the second conductivity type at about the peak concentration depth.
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11. The method of claim l, wherein the forming the first trench and the second trench includes patterning and etching a semiconductor material such that the first trench extends in parallel with the second trench along a longitudinal axis.
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14. The method of claim l, wherein the forming the heavy body structure includes forming an abrupt junction between the region of the second conductivity type and the doped well.
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15. A trench transistor comprising:
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a first trench disposed in a semiconductor material; a second trench disposed in the semiconductor material; a semiconductor mesa disposed between the first trench and the second trench, a height of the semiconductor mesa defining a depth of the first trench and a depth of the second trench, the semiconductor mesa being of a first conductivity type; a gate dielectric material disposed on a sidewall of the first trench and a sidewall of the second trench; a conductive material disposed within the gate dielectric material of the first trench and disposed within the gate dielectric material of the second trench, the conductive material forming a gate electrode of the trench transistor and substantially filling the first trench and the second trench; a doped well disposed in the semiconductor mesa, the doped well having a depth that is less than the depth of the of the first trench and less than the depth of the second trench, the doped well being of a second conductivity type that is opposite the first conductivity type; a source region disposed in the doped well, the source region having a depth that is less than the depth of the doped well, the source region being of the first conductivity type; and a heavy body structure disposed in the doped well, the heavy body structure including a region of the second conductivity type, a dopant of the second conductivity type in the region having a peak concentration at a peak concentration depth, the peak concentration depth being greater than the depth of the source region and less than the depth of the doped well. - View Dependent Claims (16, 17, 18, 19, 20)
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21. A method of forming a trench transistor, the method comprising:
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forming a first trench disposed in a semiconductor material and including a gate electrode insulated by a gate dielectric; forming a second trench disposed in the semiconductor material, the first trench and the second trench defining a semiconductor mesa, the semiconductor mesa being of a first conductivity type and disposed between the first trench and the second trench; forming a doped well disposed in the semiconductor mesa, the doped well having a depth less than a depth of the of the first trench and less than a depth of the second trench, the doped well being of a second conductivity type opposite the first conductivity type; forming a source region having the first conductivity type and disposed in the doped well, the source region having a depth less than the depth of the doped well; and forming a heavy body region disposed in the doped well, the heavy body region including a region of the second conductivity type, a dopant of the second conductivity type in the region of the second conductivity type having a peak concentration at a peak concentration depth, the peak concentration depth being greater than the depth of the source region and less than the depth of the doped well. - View Dependent Claims (22)
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Specification