Reordering in the memory controller
First Claim
1. A memory controller comprising:
- an agent interface unit coupled to a plurality of ports of the memory controller, wherein the agent interface unit is configured to receive memory operations and corresponding quality of service (QoS) parameters on each port; and
a plurality of memory channel units coupled to the agent interface unit, wherein the memory channel units each comprise a presorting queue and a memory interface unit to couple to a memory;
wherein the agent interface is configured to schedule memory operations from the ports to a given memory channel unit responsive to the QoS parameters of the memory operations, and wherein the agent interface unit is configured to reorder memory operations to a given memory channel unit based on the QoS parameters;
wherein the memory channel units are configured to group memory operations in the presorting queue according to an effect that performing the memory operations together will have on memory bandwidth utilization, and wherein the memory channel units are configured to schedule groups based on a highest level QoS parameter in each group; and
wherein the memory channel units are configured to presynthesize the memory operations into commands for the memory, and wherein at least one of the memory operations is presynthesized into a plurality of the commands for the memory, and wherein the memory interface unit is configured to further reorder the commands to achieve higher memory bandwidth utilization than other orders of the commands would achieve.
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Accused Products
Abstract
In an embodiment, a memory controller includes multiple ports. Each port may be dedicated to a different type of traffic. In an embodiment, quality of service (QoS) parameters may be defined for the traffic types, and different traffic types may have different QoS parameter definitions. The memory controller may be configured to schedule operations received on the different ports based on the QoS parameters. In an embodiment, the memory controller may support upgrade of the QoS parameters when subsequent operations are received that have higher QoS parameters, via sideband request, and/or via aging of operations. In an embodiment, the memory controller is configured to reduce emphasis on QoS parameters and increase emphasis on memory bandwidth optimization as operations flow through the memory controller pipeline.
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Citations
19 Claims
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1. A memory controller comprising:
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an agent interface unit coupled to a plurality of ports of the memory controller, wherein the agent interface unit is configured to receive memory operations and corresponding quality of service (QoS) parameters on each port; and a plurality of memory channel units coupled to the agent interface unit, wherein the memory channel units each comprise a presorting queue and a memory interface unit to couple to a memory; wherein the agent interface is configured to schedule memory operations from the ports to a given memory channel unit responsive to the QoS parameters of the memory operations, and wherein the agent interface unit is configured to reorder memory operations to a given memory channel unit based on the QoS parameters; wherein the memory channel units are configured to group memory operations in the presorting queue according to an effect that performing the memory operations together will have on memory bandwidth utilization, and wherein the memory channel units are configured to schedule groups based on a highest level QoS parameter in each group; and wherein the memory channel units are configured to presynthesize the memory operations into commands for the memory, and wherein at least one of the memory operations is presynthesized into a plurality of the commands for the memory, and wherein the memory interface unit is configured to further reorder the commands to achieve higher memory bandwidth utilization than other orders of the commands would achieve. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A memory controller comprising:
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an agent interface unit configured to coupled to a plurality of ports to receive memory operations and corresponding quality of service (QoS) parameters, wherein the agent interface unit is configured to transmit received memory operations to one of a plurality of memory channel units responsive to the memory channels addressed by the received memory operations and responsive to the QoS parameters of memory operations addressed to a given memory channel; the plurality of memory channel units coupled to the agent interface unit, wherein each memory channel unit of the plurality of memory channel units is configured to schedule the memory operations received from the agent interface unit to access memory on a respective memory channel of a plurality of memory channels, wherein each memory channel unit is configured to group received memory operations into affinity groups based on memory bandwidth usage effects among the memory operations in a given affinity group, wherein the received operations within an affinity group, if performed together, achieve higher memory bandwidth utilization than other orders of the received memory operations, and wherein each memory channel unit is configured to schedule the received memory operations responsive to the QoS parameters and further responsive to a size of the affinity groups. - View Dependent Claims (8, 9, 10, 11)
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12. A system comprising:
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a plurality of sources configured to transmit memory operations, each memory operation having an associated quality of service (QoS) parameter; and a memory controller having a plurality of ports, each source of the plurality of sources configured to transmit memory operations and corresponding QoS parameters on a port of the plurality of ports, wherein a given memory operation passes through a plurality of queues in the memory controller between a given port of the plurality of ports on which the given memory operation is received and a memory interface to memory controlled by the memory controller, and wherein an importance of the QoS parameter in scheduling the given memory operation decreases as the given memory operation passes through each queue of the plurality of queues, and wherein an importance of memory performance effects increases as the memory operation passes through the plurality of queues, and wherein a first queue of the plurality of queues is a queue for memory operations from the given port, and wherein the memory controller is configured to arbitrate among memory operations in the first queue and one or more additional queues corresponding to other ports of the plurality of ports responsive to the QoS parameters, and wherein a second queue of the plurality queues is a queue in a memory channel unit configured to transmit memory operations on one of a plurality of memory channels, wherein the given memory operation is addressed to the one of the plurality of channels, and wherein the memory controller is configured to arbitrate among the memory operations in the second queue responsive to the QoS parameters of the memory operations and responsive to a size of one or more affinity groups of the memory operations, and wherein the QoS parameters are dropped for write operations at the second queue, and wherein writes operations are stored in a separate queue from read operations, and wherein write operations are scheduled with respect to read operations based on a fullness of the separate queue. - View Dependent Claims (13, 14)
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15. A method comprising:
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receiving a plurality of memory operations on a plurality of ports of a memory controller, each memory operation having an associated quality of service (QoS) parameter; reordering memory operations from different ones of the plurality of ports responsive to the QoS parameters of the memory operations and further responsive to bandwidth sharing controls among the plurality of ports; transmitting each memory operation to a memory channel of a plurality of memory channels, the memory channel corresponding to each memory operation dependent on an address of the memory operation; writing each memory operation to either a read queue or a write queue in the memory channel unit corresponding to the memory channel, wherein the read queue is written for a read memory operation the write queue is written for a write memory operation; sorting read memory operations in the read queue into affinity groups with other read memory operations; reordering the read memory operations responsive to a size of the affinity groups and further responsive to the QoS parameters of the read memory operations; and transmitting each read memory operation to a memory interface unit. - View Dependent Claims (16, 17, 18, 19)
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Specification